Lines Matching refs:VEX_4V
573 VEX_4V, VEX_LIG;
1164 itin>, VEX_4V;
1388 VEX_4V, Sched<[WriteFShuffle]>;
1395 VEX_4V, Sched<[WriteFShuffle]>;
1546 XS, VEX_4V, VEX_LIG;
1548 XS, VEX_4V, VEX_W, VEX_LIG;
1550 XD, VEX_4V, VEX_LIG;
1552 XD, VEX_4V, VEX_W, VEX_LIG;
1679 SSE_CVT_Scalar, 0>, XS, VEX_4V;
1682 SSE_CVT_Scalar, 0>, XS, VEX_4V,
1686 SSE_CVT_Scalar, 0>, XD, VEX_4V;
1690 VEX_4V, VEX_W;
1814 IIC_SSE_CVT_Scalar_RR>, VEX_4V, VEX_LIG,
1821 XD, Requires<[HasAVX, OptForSize]>, VEX_4V, VEX_LIG,
1845 IIC_SSE_CVT_Scalar_RR>, XD, VEX_4V, Requires<[HasAVX]>,
1852 IIC_SSE_CVT_Scalar_RM>, XD, VEX_4V, Requires<[HasAVX]>,
1880 XS, Requires<[HasAVX]>, VEX_4V, VEX_LIG,
1887 XS, VEX_4V, VEX_LIG, Requires<[HasAVX, OptForSize]>,
1930 IIC_SSE_CVT_Scalar_RR>, XS, VEX_4V, Requires<[HasAVX]>,
1937 IIC_SSE_CVT_Scalar_RM>, XS, VEX_4V, Requires<[HasAVX]>,
2370 SSE_ALU_F32S, i8immZExt5>, XS, VEX_4V, VEX_LIG;
2375 XD, VEX_4V, VEX_LIG;
2410 XS, VEX_4V;
2414 XD, VEX_4V;
2525 SSEPackedSingle, i8immZExt5, loadv4f32>, PS, VEX_4V;
2529 SSEPackedDouble, i8immZExt5, loadv2f64>, PD, VEX_4V;
2533 SSEPackedSingle, i8immZExt5, loadv8f32>, PS, VEX_4V, VEX_L;
2537 SSEPackedDouble, i8immZExt5, loadv4f64>, PD, VEX_4V, VEX_L;
2606 loadv4f32, SSEPackedSingle>, PS, VEX_4V;
2609 loadv8f32, SSEPackedSingle>, PS, VEX_4V, VEX_L;
2612 loadv2f64, SSEPackedDouble>, PD, VEX_4V;
2615 loadv4f64, SSEPackedDouble>, PD, VEX_4V, VEX_L;
2696 SSEPackedSingle>, PS, VEX_4V;
2699 SSEPackedDouble>, PD, VEX_4V;
2702 SSEPackedSingle>, PS, VEX_4V;
2705 SSEPackedDouble>, PD, VEX_4V;
2709 SSEPackedSingle>, PS, VEX_4V, VEX_L;
2712 SSEPackedDouble>, PD, VEX_4V, VEX_L;
2715 SSEPackedSingle>, PS, VEX_4V, VEX_L;
2718 SSEPackedDouble>, PD, VEX_4V, VEX_L;
2848 VR128, loadv2i64, i128mem, itins, IsCommutable, 0>, VEX_4V;
2857 IsCommutable, 0>, VEX_4V, VEX_L;
2880 PS, VEX_4V;
2884 PD, VEX_4V;
2914 PS, VEX_4V;
2918 PD, VEX_4V;
2922 PS, VEX_4V, VEX_L;
2926 PD, VEX_4V, VEX_L;
2962 (loadv4i64 addr:$src2)))], 0>, PS, VEX_4V, VEX_L;
2970 PD, VEX_4V, VEX_L;
2979 (loadv2i64 addr:$src2)))], 0>, PS, VEX_4V;
2987 PD, VEX_4V;
3047 SSEPackedSingle, itins.s, 0>, PS, VEX_4V;
3050 SSEPackedDouble, itins.d, 0>, PD, VEX_4V;
3054 SSEPackedSingle, itins.s, 0>, PS, VEX_4V, VEX_L;
3057 SSEPackedDouble, itins.d, 0>, PD, VEX_4V, VEX_L;
3074 XS, VEX_4V, VEX_LIG;
3077 XD, VEX_4V, VEX_LIG;
3093 SSEPackedSingle, itins.s, 0>, XS, VEX_4V, VEX_LIG;
3096 SSEPackedDouble, itins.d, 0>, XD, VEX_4V, VEX_LIG;
3528 SSEPackedSingle, itins, "SS">, XS, VEX_4V, VEX_LIG;
3541 XD, VEX_4V, VEX_LIG;
3949 IsCommutable, 0>, VEX_4V;
3958 IsCommutable, 0>, VEX_4V, VEX_L;
4075 VEX_4V;
4079 VEX_4V, VEX_L;
4087 VEX_4V;
4091 SSE_INTMUL_ITINS_P, 1, 0>, VEX_4V, VEX_L;
4103 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4106 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4109 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4113 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4116 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4119 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4123 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4126 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
4137 VEX_4V;
4143 VEX_4V;
4150 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4153 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4156 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4160 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4163 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4166 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4170 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4173 SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
4184 VEX_4V, VEX_L;
4190 VEX_4V, VEX_L;
4431 bc_v8i16, loadv2i64, 0>, VEX_4V;
4433 bc_v4i32, loadv2i64, 0>, VEX_4V;
4436 bc_v8i16, loadv2i64, 0>, VEX_4V;
4438 bc_v4i32, loadv2i64, 0>, VEX_4V;
4443 bc_v16i16>, VEX_4V, VEX_L;
4445 bc_v8i32>, VEX_4V, VEX_L;
4448 bc_v16i16>, VEX_4V, VEX_L;
4450 bc_v8i32>, VEX_4V, VEX_L;
4512 bc_v16i8, loadv2i64, 0>, VEX_4V;
4514 bc_v8i16, loadv2i64, 0>, VEX_4V;
4516 bc_v16i8, loadv2i64, 0>, VEX_4V;
4518 bc_v8i16, loadv2i64, 0>, VEX_4V;
4522 bc_v4i32, loadv2i64, 0>, VEX_4V;
4524 bc_v2i64, loadv2i64, 0>, VEX_4V;
4526 bc_v4i32, loadv2i64, 0>, VEX_4V;
4528 bc_v2i64, loadv2i64, 0>, VEX_4V;
4533 bc_v32i8>, VEX_4V, VEX_L;
4535 bc_v16i16>, VEX_4V, VEX_L;
4537 bc_v32i8>, VEX_4V, VEX_L;
4539 bc_v16i16>, VEX_4V, VEX_L;
4543 bc_v8i32>, VEX_4V, VEX_L;
4545 bc_v4i64>, VEX_4V, VEX_L;
4547 bc_v8i32>, VEX_4V, VEX_L;
4549 bc_v4i64>, VEX_4V, VEX_L;
4617 defm VPINSRW : sse2_pinsrw<0>, PD, VEX_4V;
5277 f128mem, SSE_ALU_F32P, loadv4f32, 0>, XD, VEX_4V;
5279 f256mem, SSE_ALU_F32P, loadv8f32, 0>, XD, VEX_4V, VEX_L;
5283 f128mem, SSE_ALU_F64P, loadv2f64, 0>, PD, VEX_4V;
5285 f256mem, SSE_ALU_F64P, loadv4f64, 0>, PD, VEX_4V, VEX_L;
5372 X86fhadd, loadv4f32, 0>, VEX_4V;
5374 X86fhsub, loadv4f32, 0>, VEX_4V;
5376 X86fhadd, loadv8f32, 0>, VEX_4V, VEX_L;
5378 X86fhsub, loadv8f32, 0>, VEX_4V, VEX_L;
5382 X86fhadd, loadv2f64, 0>, VEX_4V;
5384 X86fhsub, loadv2f64, 0>, VEX_4V;
5386 X86fhadd, loadv4f64, 0>, VEX_4V, VEX_L;
5388 X86fhsub, loadv4f64, 0>, VEX_4V, VEX_L;
5620 SSE_PHADDSUBW, 0>, VEX_4V;
5623 SSE_PHADDSUBD, 0>, VEX_4V;
5626 SSE_PHADDSUBW, 0>, VEX_4V;
5629 SSE_PHADDSUBD, 0>, VEX_4V;
5632 SSE_PSIGN, 0>, VEX_4V;
5635 SSE_PSIGN, 0>, VEX_4V;
5638 SSE_PSIGN, 0>, VEX_4V;
5641 SSE_PSHUFB, 0>, VEX_4V;
5644 SSE_PHADDSUBSW, loadv2i64, 0>, VEX_4V;
5647 SSE_PHADDSUBSW, loadv2i64, 0>, VEX_4V;
5650 SSE_PMADD, loadv2i64, 0>, VEX_4V;
5654 SSE_PMULHRSW, loadv2i64, 0>, VEX_4V;
5661 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5664 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5667 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5670 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5673 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5676 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5679 SSE_PHADDSUBW, 0>, VEX_4V, VEX_L;
5682 SSE_PSHUFB, 0>, VEX_4V, VEX_L;
5685 WriteVecALU>, VEX_4V, VEX_L;
5688 WriteVecALU>, VEX_4V, VEX_L;
5691 WriteVecIMul>, VEX_4V, VEX_L;
5695 WriteVecIMul>, VEX_4V, VEX_L;
5773 defm VPALIGN : ssse3_palignr<"vpalignr", 0>, VEX_4V;
5775 defm VPALIGN : ssse3_palignr_y<"vpalignr", 0>, VEX_4V, VEX_L;
6274 defm VPINSRB : SS41I_insert8<0x20, "vpinsrb", 0>, VEX_4V;
6300 defm VPINSRD : SS41I_insert32<0x22, "vpinsrd", 0>, VEX_4V;
6326 defm VPINSRQ : SS41I_insert64<0x22, "vpinsrq", 0>, VEX_4V, VEX_W;
6360 defm VINSERTPS : SS41I_insertf32<0x21, "vinsertps", 0>, VEX_4V;
6526 int_x86_sse41_round_sd, 0>, VEX_4V, VEX_LIG;
6832 VEX_4V;
6835 VEX_4V;
6838 VEX_4V;
6841 VEX_4V;
6844 VEX_4V;
6847 VEX_4V;
6850 VEX_4V;
6853 VEX_4V;
6856 SSE_INTMUL_ITINS_P, 1, 0>, VEX_4V;
6862 VEX_4V, VEX_L;
6865 VEX_4V, VEX_L;
6868 VEX_4V, VEX_L;
6871 VEX_4V, VEX_L;
6874 VEX_4V, VEX_L;
6877 VEX_4V, VEX_L;
6880 VEX_4V, VEX_L;
6883 VEX_4V, VEX_L;
6886 SSE_INTMUL_ITINS_P, 1, 0>, VEX_4V, VEX_L;
6914 VEX_4V;
6917 VEX_4V;
6922 VEX_4V, VEX_L;
6925 VEX_4V, VEX_L;
6995 DEFAULT_ITINS_MPSADSCHED>, VEX_4V;
7001 DEFAULT_ITINS_FBLENDSCHED>, VEX_4V;
7004 DEFAULT_ITINS_FBLENDSCHED>, VEX_4V, VEX_L;
7009 DEFAULT_ITINS_FBLENDSCHED>, VEX_4V;
7012 DEFAULT_ITINS_FBLENDSCHED>, VEX_4V, VEX_L;
7016 DEFAULT_ITINS_BLENDSCHED>, VEX_4V;
7021 SSE_DPPS_ITINS>, VEX_4V;
7025 SSE_DPPS_ITINS>, VEX_4V;
7029 SSE_DPPS_ITINS>, VEX_4V, VEX_L;
7036 DEFAULT_ITINS_MPSADSCHED>, VEX_4V, VEX_L;
7040 DEFAULT_ITINS_BLENDSCHED>, VEX_4V, VEX_L;
7080 NoItinerary, SSEPackedInt>, TAPD, VEX_4V, VEX_I8IMM,
7090 NoItinerary, SSEPackedInt>, TAPD, VEX_4V, VEX_I8IMM,
7328 loadv2i64, i128mem, 0>, VEX_4V;
7332 loadv4i64, i256mem, 0>, VEX_4V, VEX_L;
7621 int_x86_aesni_aesenc, loadv2i64, 0>, VEX_4V;
7623 int_x86_aesni_aesenclast, loadv2i64, 0>, VEX_4V;
7625 int_x86_aesni_aesdec, loadv2i64, 0>, VEX_4V;
7627 int_x86_aesni_aesdeclast, loadv2i64, 0>, VEX_4V;
7867 []>, Sched<[WriteFShuffle]>, VEX_4V, VEX_L;
7872 []>, Sched<[WriteFShuffleLd, ReadAfterLd]>, VEX_4V, VEX_L;
8016 VEX_4V;
8021 VEX_4V, VEX_L;
8025 [(IntSt addr:$dst, VR128:$src1, VR128:$src2)]>, VEX_4V;
8029 [(IntSt256 addr:$dst, VR256:$src1, VR256:$src2)]>, VEX_4V, VEX_L;
8055 [(set RC:$dst, (IntVar RC:$src1, RC:$src2))]>, VEX_4V,
8061 (bitconvert (i_frag addr:$src2))))]>, VEX_4V,
8135 (i8 imm:$src3))))]>, VEX_4V, VEX_L,
8141 (i8 imm:$src3)))]>, VEX_4V, VEX_L,
8273 Sched<[WriteBlend]>, VEX_4V;
8281 Sched<[WriteBlendLd, ReadAfterLd]>, VEX_4V;
8458 Sched<[Sched]>, VEX_4V, VEX_L;
8466 Sched<[Sched.Folded, ReadAfterLd]>, VEX_4V, VEX_L;
8506 VEX_4V, VEX_L;
8512 Sched<[WriteShuffle256Ld, ReadAfterLd]>, VEX_4V, VEX_L;
8541 []>, Sched<[WriteShuffle256]>, VEX_4V, VEX_L;
8546 []>, Sched<[WriteShuffle256Ld, ReadAfterLd]>, VEX_4V, VEX_L;
8646 [(set VR128:$dst, (IntLd128 addr:$src2, VR128:$src1))]>, VEX_4V;
8651 VEX_4V, VEX_L;
8655 [(IntSt128 addr:$dst, VR128:$src1, VR128:$src2)]>, VEX_4V;
8659 [(IntSt256 addr:$dst, VR256:$src1, VR256:$src2)]>, VEX_4V, VEX_L;
8793 VEX_4V, Sched<[WriteVarVecShift]>;
8800 VEX_4V, Sched<[WriteVarVecShiftLd, ReadAfterLd]>;
8806 VEX_4V, VEX_L, Sched<[WriteVarVecShift]>;
8813 VEX_4V, VEX_L, Sched<[WriteVarVecShiftLd, ReadAfterLd]>;