Lines Matching refs:LE
3 …-mattr=+altivec -mattr=-vsx -mcpu=pwr8 -mattr=-power8-altivec | FileCheck %s -check-prefix=CHECK-LE
5 …tr=+altivec -mattr=+vsx -mcpu=pwr8 -mattr=-power8-altivec | FileCheck %s -check-prefix=CHECK-LE-VSX
16 ; CHECK-LE-LABEL: test_v4i32:
17 ; CHECK-LE: vmsumuhm
18 ; CHECK-LE-NOT: mullw
22 ; CHECK-LE-VSX-LABEL: test_v4i32:
23 ; CHECK-LE-VSX: vmsumuhm
24 ; CHECK-LE-VSX-NOT: mullw
35 ; CHECK-LE-LABEL: test_v8i16:
36 ; CHECK-LE: vmladduhm
37 ; CHECK-LE-NOT: mullw
41 ; CHECK-LE-VSX-LABEL: test_v8i16:
42 ; CHECK-LE-VSX: vmladduhm
43 ; CHECK-LE-VSX-NOT: mullw
55 ; CHECK-LE-LABEL: test_v16i8:
56 ; CHECK-LE: vmuloub [[REG1:[0-9]+]]
57 ; CHECK-LE: vmuleub [[REG2:[0-9]+]]
58 ; CHECK-LE: vperm {{[0-9]+}}, [[REG2]], [[REG1]]
59 ; CHECK-LE-NOT: mullw
64 ; CHECK-LE-VSX-LABEL: test_v16i8:
65 ; CHECK-LE-VSX: vmuloub [[REG1:[0-9]+]]
66 ; CHECK-LE-VSX: vmuleub [[REG2:[0-9]+]]
67 ; CHECK-LE-VSX: vperm {{[0-9]+}}, [[REG2]], [[REG1]]
68 ; CHECK-LE-VSX-NOT: mullw
83 ; CHECK-LE-LABEL: test_float:
84 ; CHECK-LE: vspltisw [[ZNEG:[0-9]+]], -1
85 ; CHECK-LE: vslw {{[0-9]+}}, [[ZNEG]], [[ZNEG]]
86 ; CHECK-LE: vmaddfp
89 ; CHECK-LE-VSX-LABEL: test_float:
90 ; CHECK-LE-VSX: xvmulsp