66     MachineInstr * MI, MachineBasicBlock * BB) const  in EmitInstrWithCustomInserter()
69   MachineRegisterInfo & MRI = BB->getParent()->getRegInfo();  in EmitInstrWithCustomInserter()
73     AppendS_WAITCNT(MI, *BB, llvm::next(I));  in EmitInstrWithCustomInserter()
74     return BB;  in EmitInstrWithCustomInserter()
79     return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);  in EmitInstrWithCustomInserter()
82     BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::V_MOV_B32_e64))  in EmitInstrWithCustomInserter()
97     BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::V_MOV_B32_e64))  in EmitInstrWithCustomInserter()
112     BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::V_MOV_B32_e64))  in EmitInstrWithCustomInserter()
127     LowerSI_INTERP(MI, *BB, I, MRI);  in EmitInstrWithCustomInserter()
130     LowerSI_INTERP_CONST(MI, *BB, I, MRI);  in EmitInstrWithCustomInserter()
133     LowerSI_KIL(MI, *BB, I, MRI);  in EmitInstrWithCustomInserter()
136     LowerSI_V_CNDLT(MI, *BB, I, MRI);  in EmitInstrWithCustomInserter()
139   return BB;  in EmitInstrWithCustomInserter()
142 void SITargetLowering::AppendS_WAITCNT(MachineInstr *MI, MachineBasicBlock &BB,  in AppendS_WAITCNT()  argument
145   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::S_WAITCNT))  in AppendS_WAITCNT()
149 void SITargetLowering::LowerSI_INTERP(MachineInstr *MI, MachineBasicBlock &BB,  in LowerSI_INTERP()  argument
161   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::S_MOV_B32), M0)  in LowerSI_INTERP()
164   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_INTERP_P1_F32), tmp)  in LowerSI_INTERP()
170   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_INTERP_P2_F32))  in LowerSI_INTERP()
182     MachineBasicBlock &BB, MachineBasicBlock::iterator I,  in LowerSI_INTERP_CONST()  argument
191   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::S_MOV_B32), M0)  in LowerSI_INTERP_CONST()
194   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_INTERP_MOV_F32))  in LowerSI_INTERP_CONST()
203 void SITargetLowering::LowerSI_KIL(MachineInstr *MI, MachineBasicBlock &BB,  in LowerSI_KIL()  argument
207   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_CMPX_LE_F32_e32),  in LowerSI_KIL()
213   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::S_CBRANCH_EXECNZ))  in LowerSI_KIL()
218   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::EXP))  in LowerSI_KIL()
230   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::S_ENDPGM));  in LowerSI_KIL()
235 void SITargetLowering::LowerSI_V_CNDLT(MachineInstr *MI, MachineBasicBlock &BB,  in LowerSI_V_CNDLT()  argument
238   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_CMP_LT_F32_e32),  in LowerSI_V_CNDLT()
243   BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_CNDMASK_B32))  in LowerSI_V_CNDLT()