• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 //===-- IfConversion.cpp - Machine code if conversion pass. ---------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the machine instruction level if-conversion pass.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/CodeGen/Passes.h"
15 #include "BranchFolding.h"
16 #include "llvm/ADT/STLExtras.h"
17 #include "llvm/ADT/SmallSet.h"
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/CodeGen/LivePhysRegs.h"
20 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
21 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineModuleInfo.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/TargetSchedule.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Support/raw_ostream.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetLowering.h"
33 #include "llvm/Target/TargetRegisterInfo.h"
34 #include "llvm/Target/TargetSubtargetInfo.h"
35 #include <algorithm>
36 
37 using namespace llvm;
38 
39 #define DEBUG_TYPE "ifcvt"
40 
41 // Hidden options for help debugging.
42 static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
43 static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
44 static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
45 static cl::opt<bool> DisableSimple("disable-ifcvt-simple",
46                                    cl::init(false), cl::Hidden);
47 static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
48                                     cl::init(false), cl::Hidden);
49 static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
50                                      cl::init(false), cl::Hidden);
51 static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
52                                       cl::init(false), cl::Hidden);
53 static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
54                                       cl::init(false), cl::Hidden);
55 static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
56                                        cl::init(false), cl::Hidden);
57 static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
58                                     cl::init(false), cl::Hidden);
59 static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
60                                      cl::init(true), cl::Hidden);
61 
62 STATISTIC(NumSimple,       "Number of simple if-conversions performed");
63 STATISTIC(NumSimpleFalse,  "Number of simple (F) if-conversions performed");
64 STATISTIC(NumTriangle,     "Number of triangle if-conversions performed");
65 STATISTIC(NumTriangleRev,  "Number of triangle (R) if-conversions performed");
66 STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
67 STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
68 STATISTIC(NumDiamonds,     "Number of diamond if-conversions performed");
69 STATISTIC(NumIfConvBBs,    "Number of if-converted blocks");
70 STATISTIC(NumDupBBs,       "Number of duplicated blocks");
71 STATISTIC(NumUnpred,       "Number of true blocks of diamonds unpredicated");
72 
73 namespace {
74   class IfConverter : public MachineFunctionPass {
75     enum IfcvtKind {
76       ICNotClassfied,  // BB data valid, but not classified.
77       ICSimpleFalse,   // Same as ICSimple, but on the false path.
78       ICSimple,        // BB is entry of an one split, no rejoin sub-CFG.
79       ICTriangleFRev,  // Same as ICTriangleFalse, but false path rev condition.
80       ICTriangleRev,   // Same as ICTriangle, but true path rev condition.
81       ICTriangleFalse, // Same as ICTriangle, but on the false path.
82       ICTriangle,      // BB is entry of a triangle sub-CFG.
83       ICDiamond        // BB is entry of a diamond sub-CFG.
84     };
85 
86     /// BBInfo - One per MachineBasicBlock, this is used to cache the result
87     /// if-conversion feasibility analysis. This includes results from
88     /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
89     /// classification, and common tail block of its successors (if it's a
90     /// diamond shape), its size, whether it's predicable, and whether any
91     /// instruction can clobber the 'would-be' predicate.
92     ///
93     /// IsDone          - True if BB is not to be considered for ifcvt.
94     /// IsBeingAnalyzed - True if BB is currently being analyzed.
95     /// IsAnalyzed      - True if BB has been analyzed (info is still valid).
96     /// IsEnqueued      - True if BB has been enqueued to be ifcvt'ed.
97     /// IsBrAnalyzable  - True if AnalyzeBranch() returns false.
98     /// HasFallThrough  - True if BB may fallthrough to the following BB.
99     /// IsUnpredicable  - True if BB is known to be unpredicable.
100     /// ClobbersPred    - True if BB could modify predicates (e.g. has
101     ///                   cmp, call, etc.)
102     /// NonPredSize     - Number of non-predicated instructions.
103     /// ExtraCost       - Extra cost for multi-cycle instructions.
104     /// ExtraCost2      - Some instructions are slower when predicated
105     /// BB              - Corresponding MachineBasicBlock.
106     /// TrueBB / FalseBB- See AnalyzeBranch().
107     /// BrCond          - Conditions for end of block conditional branches.
108     /// Predicate       - Predicate used in the BB.
109     struct BBInfo {
110       bool IsDone          : 1;
111       bool IsBeingAnalyzed : 1;
112       bool IsAnalyzed      : 1;
113       bool IsEnqueued      : 1;
114       bool IsBrAnalyzable  : 1;
115       bool HasFallThrough  : 1;
116       bool IsUnpredicable  : 1;
117       bool CannotBeCopied  : 1;
118       bool ClobbersPred    : 1;
119       unsigned NonPredSize;
120       unsigned ExtraCost;
121       unsigned ExtraCost2;
122       MachineBasicBlock *BB;
123       MachineBasicBlock *TrueBB;
124       MachineBasicBlock *FalseBB;
125       SmallVector<MachineOperand, 4> BrCond;
126       SmallVector<MachineOperand, 4> Predicate;
BBInfo__anon959a42170111::IfConverter::BBInfo127       BBInfo() : IsDone(false), IsBeingAnalyzed(false),
128                  IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
129                  HasFallThrough(false), IsUnpredicable(false),
130                  CannotBeCopied(false), ClobbersPred(false), NonPredSize(0),
131                  ExtraCost(0), ExtraCost2(0), BB(nullptr), TrueBB(nullptr),
132                  FalseBB(nullptr) {}
133     };
134 
135     /// IfcvtToken - Record information about pending if-conversions to attempt:
136     /// BBI             - Corresponding BBInfo.
137     /// Kind            - Type of block. See IfcvtKind.
138     /// NeedSubsumption - True if the to-be-predicated BB has already been
139     ///                   predicated.
140     /// NumDups      - Number of instructions that would be duplicated due
141     ///                   to this if-conversion. (For diamonds, the number of
142     ///                   identical instructions at the beginnings of both
143     ///                   paths).
144     /// NumDups2     - For diamonds, the number of identical instructions
145     ///                   at the ends of both paths.
146     struct IfcvtToken {
147       BBInfo &BBI;
148       IfcvtKind Kind;
149       bool NeedSubsumption;
150       unsigned NumDups;
151       unsigned NumDups2;
IfcvtToken__anon959a42170111::IfConverter::IfcvtToken152       IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0)
153         : BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {}
154     };
155 
156     /// BBAnalysis - Results of if-conversion feasibility analysis indexed by
157     /// basic block number.
158     std::vector<BBInfo> BBAnalysis;
159     TargetSchedModel SchedModel;
160 
161     const TargetLoweringBase *TLI;
162     const TargetInstrInfo *TII;
163     const TargetRegisterInfo *TRI;
164     const MachineBlockFrequencyInfo *MBFI;
165     const MachineBranchProbabilityInfo *MBPI;
166     MachineRegisterInfo *MRI;
167 
168     LivePhysRegs Redefs;
169     LivePhysRegs DontKill;
170 
171     bool PreRegAlloc;
172     bool MadeChange;
173     int FnNum;
174     std::function<bool(const Function &)> PredicateFtor;
175 
176   public:
177     static char ID;
IfConverter(std::function<bool (const Function &)> Ftor=nullptr)178     IfConverter(std::function<bool(const Function &)> Ftor = nullptr)
179         : MachineFunctionPass(ID), FnNum(-1), PredicateFtor(Ftor) {
180       initializeIfConverterPass(*PassRegistry::getPassRegistry());
181     }
182 
getAnalysisUsage(AnalysisUsage & AU) const183     void getAnalysisUsage(AnalysisUsage &AU) const override {
184       AU.addRequired<MachineBlockFrequencyInfo>();
185       AU.addRequired<MachineBranchProbabilityInfo>();
186       MachineFunctionPass::getAnalysisUsage(AU);
187     }
188 
189     bool runOnMachineFunction(MachineFunction &MF) override;
190 
191   private:
192     bool ReverseBranchCondition(BBInfo &BBI);
193     bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
194                      BranchProbability Prediction) const;
195     bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
196                        bool FalseBranch, unsigned &Dups,
197                        BranchProbability Prediction) const;
198     bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
199                       unsigned &Dups1, unsigned &Dups2) const;
200     void ScanInstructions(BBInfo &BBI);
201     void AnalyzeBlock(MachineBasicBlock *MBB, std::vector<IfcvtToken*> &Tokens);
202     bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
203                              bool isTriangle = false, bool RevBranch = false);
204     void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens);
205     void InvalidatePreds(MachineBasicBlock *BB);
206     void RemoveExtraEdges(BBInfo &BBI);
207     bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind);
208     bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind);
209     bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
210                           unsigned NumDups1, unsigned NumDups2);
211     void PredicateBlock(BBInfo &BBI,
212                         MachineBasicBlock::iterator E,
213                         SmallVectorImpl<MachineOperand> &Cond,
214                         SmallSet<unsigned, 4> *LaterRedefs = nullptr);
215     void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
216                                SmallVectorImpl<MachineOperand> &Cond,
217                                bool IgnoreBr = false);
218     void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true);
219 
MeetIfcvtSizeLimit(MachineBasicBlock & BB,unsigned Cycle,unsigned Extra,BranchProbability Prediction) const220     bool MeetIfcvtSizeLimit(MachineBasicBlock &BB,
221                             unsigned Cycle, unsigned Extra,
222                             BranchProbability Prediction) const {
223       return Cycle > 0 && TII->isProfitableToIfCvt(BB, Cycle, Extra,
224                                                    Prediction);
225     }
226 
MeetIfcvtSizeLimit(MachineBasicBlock & TBB,unsigned TCycle,unsigned TExtra,MachineBasicBlock & FBB,unsigned FCycle,unsigned FExtra,BranchProbability Prediction) const227     bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
228                             unsigned TCycle, unsigned TExtra,
229                             MachineBasicBlock &FBB,
230                             unsigned FCycle, unsigned FExtra,
231                             BranchProbability Prediction) const {
232       return TCycle > 0 && FCycle > 0 &&
233         TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
234                                  Prediction);
235     }
236 
237     // blockAlwaysFallThrough - Block ends without a terminator.
blockAlwaysFallThrough(BBInfo & BBI) const238     bool blockAlwaysFallThrough(BBInfo &BBI) const {
239       return BBI.IsBrAnalyzable && BBI.TrueBB == nullptr;
240     }
241 
242     // IfcvtTokenCmp - Used to sort if-conversion candidates.
IfcvtTokenCmp(IfcvtToken * C1,IfcvtToken * C2)243     static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) {
244       int Incr1 = (C1->Kind == ICDiamond)
245         ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups;
246       int Incr2 = (C2->Kind == ICDiamond)
247         ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups;
248       if (Incr1 > Incr2)
249         return true;
250       else if (Incr1 == Incr2) {
251         // Favors subsumption.
252         if (!C1->NeedSubsumption && C2->NeedSubsumption)
253           return true;
254         else if (C1->NeedSubsumption == C2->NeedSubsumption) {
255           // Favors diamond over triangle, etc.
256           if ((unsigned)C1->Kind < (unsigned)C2->Kind)
257             return true;
258           else if (C1->Kind == C2->Kind)
259             return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber();
260         }
261       }
262       return false;
263     }
264   };
265 
266   char IfConverter::ID = 0;
267 }
268 
269 char &llvm::IfConverterID = IfConverter::ID;
270 
271 INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)272 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
273 INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
274 
275 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
276   if (PredicateFtor && !PredicateFtor(*MF.getFunction()))
277     return false;
278 
279   const TargetSubtargetInfo &ST = MF.getSubtarget();
280   TLI = ST.getTargetLowering();
281   TII = ST.getInstrInfo();
282   TRI = ST.getRegisterInfo();
283   MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
284   MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
285   MRI = &MF.getRegInfo();
286   SchedModel.init(ST.getSchedModel(), &ST, TII);
287 
288   if (!TII) return false;
289 
290   PreRegAlloc = MRI->isSSA();
291 
292   bool BFChange = false;
293   if (!PreRegAlloc) {
294     // Tail merge tend to expose more if-conversion opportunities.
295     BranchFolder BF(true, false, *MBFI, *MBPI);
296     BFChange = BF.OptimizeFunction(MF, TII, ST.getRegisterInfo(),
297                                    getAnalysisIfAvailable<MachineModuleInfo>());
298   }
299 
300   DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum <<  ") \'"
301                << MF.getName() << "\'");
302 
303   if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
304     DEBUG(dbgs() << " skipped\n");
305     return false;
306   }
307   DEBUG(dbgs() << "\n");
308 
309   MF.RenumberBlocks();
310   BBAnalysis.resize(MF.getNumBlockIDs());
311 
312   std::vector<IfcvtToken*> Tokens;
313   MadeChange = false;
314   unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle +
315     NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds;
316   while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) {
317     // Do an initial analysis for each basic block and find all the potential
318     // candidates to perform if-conversion.
319     bool Change = false;
320     AnalyzeBlocks(MF, Tokens);
321     while (!Tokens.empty()) {
322       IfcvtToken *Token = Tokens.back();
323       Tokens.pop_back();
324       BBInfo &BBI = Token->BBI;
325       IfcvtKind Kind = Token->Kind;
326       unsigned NumDups = Token->NumDups;
327       unsigned NumDups2 = Token->NumDups2;
328 
329       delete Token;
330 
331       // If the block has been evicted out of the queue or it has already been
332       // marked dead (due to it being predicated), then skip it.
333       if (BBI.IsDone)
334         BBI.IsEnqueued = false;
335       if (!BBI.IsEnqueued)
336         continue;
337 
338       BBI.IsEnqueued = false;
339 
340       bool RetVal = false;
341       switch (Kind) {
342       default: llvm_unreachable("Unexpected!");
343       case ICSimple:
344       case ICSimpleFalse: {
345         bool isFalse = Kind == ICSimpleFalse;
346         if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
347         DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
348                                             " false" : "")
349                      << "): BB#" << BBI.BB->getNumber() << " ("
350                      << ((Kind == ICSimpleFalse)
351                          ? BBI.FalseBB->getNumber()
352                          : BBI.TrueBB->getNumber()) << ") ");
353         RetVal = IfConvertSimple(BBI, Kind);
354         DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
355         if (RetVal) {
356           if (isFalse) ++NumSimpleFalse;
357           else         ++NumSimple;
358         }
359        break;
360       }
361       case ICTriangle:
362       case ICTriangleRev:
363       case ICTriangleFalse:
364       case ICTriangleFRev: {
365         bool isFalse = Kind == ICTriangleFalse;
366         bool isRev   = (Kind == ICTriangleRev || Kind == ICTriangleFRev);
367         if (DisableTriangle && !isFalse && !isRev) break;
368         if (DisableTriangleR && !isFalse && isRev) break;
369         if (DisableTriangleF && isFalse && !isRev) break;
370         if (DisableTriangleFR && isFalse && isRev) break;
371         DEBUG(dbgs() << "Ifcvt (Triangle");
372         if (isFalse)
373           DEBUG(dbgs() << " false");
374         if (isRev)
375           DEBUG(dbgs() << " rev");
376         DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
377                      << BBI.TrueBB->getNumber() << ",F:"
378                      << BBI.FalseBB->getNumber() << ") ");
379         RetVal = IfConvertTriangle(BBI, Kind);
380         DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
381         if (RetVal) {
382           if (isFalse) {
383             if (isRev) ++NumTriangleFRev;
384             else       ++NumTriangleFalse;
385           } else {
386             if (isRev) ++NumTriangleRev;
387             else       ++NumTriangle;
388           }
389         }
390         break;
391       }
392       case ICDiamond: {
393         if (DisableDiamond) break;
394         DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
395                      << BBI.TrueBB->getNumber() << ",F:"
396                      << BBI.FalseBB->getNumber() << ") ");
397         RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2);
398         DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
399         if (RetVal) ++NumDiamonds;
400         break;
401       }
402       }
403 
404       Change |= RetVal;
405 
406       NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev +
407         NumTriangleFalse + NumTriangleFRev + NumDiamonds;
408       if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit)
409         break;
410     }
411 
412     if (!Change)
413       break;
414     MadeChange |= Change;
415   }
416 
417   // Delete tokens in case of early exit.
418   while (!Tokens.empty()) {
419     IfcvtToken *Token = Tokens.back();
420     Tokens.pop_back();
421     delete Token;
422   }
423 
424   Tokens.clear();
425   BBAnalysis.clear();
426 
427   if (MadeChange && IfCvtBranchFold) {
428     BranchFolder BF(false, false, *MBFI, *MBPI);
429     BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),
430                         getAnalysisIfAvailable<MachineModuleInfo>());
431   }
432 
433   MadeChange |= BFChange;
434   return MadeChange;
435 }
436 
437 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
438 /// its 'true' successor.
findFalseBlock(MachineBasicBlock * BB,MachineBasicBlock * TrueBB)439 static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
440                                          MachineBasicBlock *TrueBB) {
441   for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
442          E = BB->succ_end(); SI != E; ++SI) {
443     MachineBasicBlock *SuccBB = *SI;
444     if (SuccBB != TrueBB)
445       return SuccBB;
446   }
447   return nullptr;
448 }
449 
450 /// ReverseBranchCondition - Reverse the condition of the end of the block
451 /// branch. Swap block's 'true' and 'false' successors.
ReverseBranchCondition(BBInfo & BBI)452 bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
453   DebugLoc dl;  // FIXME: this is nowhere
454   if (!TII->ReverseBranchCondition(BBI.BrCond)) {
455     TII->RemoveBranch(*BBI.BB);
456     TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
457     std::swap(BBI.TrueBB, BBI.FalseBB);
458     return true;
459   }
460   return false;
461 }
462 
463 /// getNextBlock - Returns the next block in the function blocks ordering. If
464 /// it is the end, returns NULL.
getNextBlock(MachineBasicBlock * BB)465 static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
466   MachineFunction::iterator I = BB->getIterator();
467   MachineFunction::iterator E = BB->getParent()->end();
468   if (++I == E)
469     return nullptr;
470   return &*I;
471 }
472 
473 /// ValidSimple - Returns true if the 'true' block (along with its
474 /// predecessor) forms a valid simple shape for ifcvt. It also returns the
475 /// number of instructions that the ifcvt would need to duplicate if performed
476 /// in Dups.
ValidSimple(BBInfo & TrueBBI,unsigned & Dups,BranchProbability Prediction) const477 bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
478                               BranchProbability Prediction) const {
479   Dups = 0;
480   if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
481     return false;
482 
483   if (TrueBBI.IsBrAnalyzable)
484     return false;
485 
486   if (TrueBBI.BB->pred_size() > 1) {
487     if (TrueBBI.CannotBeCopied ||
488         !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize,
489                                         Prediction))
490       return false;
491     Dups = TrueBBI.NonPredSize;
492   }
493 
494   return true;
495 }
496 
497 /// ValidTriangle - Returns true if the 'true' and 'false' blocks (along
498 /// with their common predecessor) forms a valid triangle shape for ifcvt.
499 /// If 'FalseBranch' is true, it checks if 'true' block's false branch
500 /// branches to the 'false' block rather than the other way around. It also
501 /// returns the number of instructions that the ifcvt would need to duplicate
502 /// if performed in 'Dups'.
ValidTriangle(BBInfo & TrueBBI,BBInfo & FalseBBI,bool FalseBranch,unsigned & Dups,BranchProbability Prediction) const503 bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
504                                 bool FalseBranch, unsigned &Dups,
505                                 BranchProbability Prediction) const {
506   Dups = 0;
507   if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
508     return false;
509 
510   if (TrueBBI.BB->pred_size() > 1) {
511     if (TrueBBI.CannotBeCopied)
512       return false;
513 
514     unsigned Size = TrueBBI.NonPredSize;
515     if (TrueBBI.IsBrAnalyzable) {
516       if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
517         // Ends with an unconditional branch. It will be removed.
518         --Size;
519       else {
520         MachineBasicBlock *FExit = FalseBranch
521           ? TrueBBI.TrueBB : TrueBBI.FalseBB;
522         if (FExit)
523           // Require a conditional branch
524           ++Size;
525       }
526     }
527     if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size, Prediction))
528       return false;
529     Dups = Size;
530   }
531 
532   MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
533   if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
534     MachineFunction::iterator I = TrueBBI.BB->getIterator();
535     if (++I == TrueBBI.BB->getParent()->end())
536       return false;
537     TExit = &*I;
538   }
539   return TExit && TExit == FalseBBI.BB;
540 }
541 
542 /// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
543 /// with their common predecessor) forms a valid diamond shape for ifcvt.
ValidDiamond(BBInfo & TrueBBI,BBInfo & FalseBBI,unsigned & Dups1,unsigned & Dups2) const544 bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
545                                unsigned &Dups1, unsigned &Dups2) const {
546   Dups1 = Dups2 = 0;
547   if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
548       FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
549     return false;
550 
551   MachineBasicBlock *TT = TrueBBI.TrueBB;
552   MachineBasicBlock *FT = FalseBBI.TrueBB;
553 
554   if (!TT && blockAlwaysFallThrough(TrueBBI))
555     TT = getNextBlock(TrueBBI.BB);
556   if (!FT && blockAlwaysFallThrough(FalseBBI))
557     FT = getNextBlock(FalseBBI.BB);
558   if (TT != FT)
559     return false;
560   if (!TT && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
561     return false;
562   if  (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
563     return false;
564 
565   // FIXME: Allow true block to have an early exit?
566   if (TrueBBI.FalseBB || FalseBBI.FalseBB ||
567       (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred))
568     return false;
569 
570   // Count duplicate instructions at the beginning of the true and false blocks.
571   MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
572   MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
573   MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
574   MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
575   while (TIB != TIE && FIB != FIE) {
576     // Skip dbg_value instructions. These do not count.
577     if (TIB->isDebugValue()) {
578       while (TIB != TIE && TIB->isDebugValue())
579         ++TIB;
580       if (TIB == TIE)
581         break;
582     }
583     if (FIB->isDebugValue()) {
584       while (FIB != FIE && FIB->isDebugValue())
585         ++FIB;
586       if (FIB == FIE)
587         break;
588     }
589     if (!TIB->isIdenticalTo(FIB))
590       break;
591     ++Dups1;
592     ++TIB;
593     ++FIB;
594   }
595 
596   // Now, in preparation for counting duplicate instructions at the ends of the
597   // blocks, move the end iterators up past any branch instructions.
598   while (TIE != TIB) {
599     --TIE;
600     if (!TIE->isBranch())
601       break;
602   }
603   while (FIE != FIB) {
604     --FIE;
605     if (!FIE->isBranch())
606       break;
607   }
608 
609   // If Dups1 includes all of a block, then don't count duplicate
610   // instructions at the end of the blocks.
611   if (TIB == TIE || FIB == FIE)
612     return true;
613 
614   // Count duplicate instructions at the ends of the blocks.
615   while (TIE != TIB && FIE != FIB) {
616     // Skip dbg_value instructions. These do not count.
617     if (TIE->isDebugValue()) {
618       while (TIE != TIB && TIE->isDebugValue())
619         --TIE;
620       if (TIE == TIB)
621         break;
622     }
623     if (FIE->isDebugValue()) {
624       while (FIE != FIB && FIE->isDebugValue())
625         --FIE;
626       if (FIE == FIB)
627         break;
628     }
629     if (!TIE->isIdenticalTo(FIE))
630       break;
631     ++Dups2;
632     --TIE;
633     --FIE;
634   }
635 
636   return true;
637 }
638 
639 /// ScanInstructions - Scan all the instructions in the block to determine if
640 /// the block is predicable. In most cases, that means all the instructions
641 /// in the block are isPredicable(). Also checks if the block contains any
642 /// instruction which can clobber a predicate (e.g. condition code register).
643 /// If so, the block is not predicable unless it's the last instruction.
ScanInstructions(BBInfo & BBI)644 void IfConverter::ScanInstructions(BBInfo &BBI) {
645   if (BBI.IsDone)
646     return;
647 
648   bool AlreadyPredicated = !BBI.Predicate.empty();
649   // First analyze the end of BB branches.
650   BBI.TrueBB = BBI.FalseBB = nullptr;
651   BBI.BrCond.clear();
652   BBI.IsBrAnalyzable =
653     !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
654   BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == nullptr;
655 
656   if (BBI.BrCond.size()) {
657     // No false branch. This BB must end with a conditional branch and a
658     // fallthrough.
659     if (!BBI.FalseBB)
660       BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
661     if (!BBI.FalseBB) {
662       // Malformed bcc? True and false blocks are the same?
663       BBI.IsUnpredicable = true;
664       return;
665     }
666   }
667 
668   // Then scan all the instructions.
669   BBI.NonPredSize = 0;
670   BBI.ExtraCost = 0;
671   BBI.ExtraCost2 = 0;
672   BBI.ClobbersPred = false;
673   for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
674        I != E; ++I) {
675     if (I->isDebugValue())
676       continue;
677 
678     if (I->isNotDuplicable())
679       BBI.CannotBeCopied = true;
680 
681     bool isPredicated = TII->isPredicated(I);
682     bool isCondBr = BBI.IsBrAnalyzable && I->isConditionalBranch();
683 
684     // A conditional branch is not predicable, but it may be eliminated.
685     if (isCondBr)
686       continue;
687 
688     if (!isPredicated) {
689       BBI.NonPredSize++;
690       unsigned ExtraPredCost = TII->getPredicationCost(&*I);
691       unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
692       if (NumCycles > 1)
693         BBI.ExtraCost += NumCycles-1;
694       BBI.ExtraCost2 += ExtraPredCost;
695     } else if (!AlreadyPredicated) {
696       // FIXME: This instruction is already predicated before the
697       // if-conversion pass. It's probably something like a conditional move.
698       // Mark this block unpredicable for now.
699       BBI.IsUnpredicable = true;
700       return;
701     }
702 
703     if (BBI.ClobbersPred && !isPredicated) {
704       // Predicate modification instruction should end the block (except for
705       // already predicated instructions and end of block branches).
706       // Predicate may have been modified, the subsequent (currently)
707       // unpredicated instructions cannot be correctly predicated.
708       BBI.IsUnpredicable = true;
709       return;
710     }
711 
712     // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
713     // still potentially predicable.
714     std::vector<MachineOperand> PredDefs;
715     if (TII->DefinesPredicate(I, PredDefs))
716       BBI.ClobbersPred = true;
717 
718     if (!TII->isPredicable(I)) {
719       BBI.IsUnpredicable = true;
720       return;
721     }
722   }
723 }
724 
725 /// FeasibilityAnalysis - Determine if the block is a suitable candidate to be
726 /// predicated by the specified predicate.
FeasibilityAnalysis(BBInfo & BBI,SmallVectorImpl<MachineOperand> & Pred,bool isTriangle,bool RevBranch)727 bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
728                                       SmallVectorImpl<MachineOperand> &Pred,
729                                       bool isTriangle, bool RevBranch) {
730   // If the block is dead or unpredicable, then it cannot be predicated.
731   if (BBI.IsDone || BBI.IsUnpredicable)
732     return false;
733 
734   // If it is already predicated but we couldn't analyze its terminator, the
735   // latter might fallthrough, but we can't determine where to.
736   // Conservatively avoid if-converting again.
737   if (BBI.Predicate.size() && !BBI.IsBrAnalyzable)
738     return false;
739 
740   // If it is already predicated, check if the new predicate subsumes
741   // its predicate.
742   if (BBI.Predicate.size() && !TII->SubsumesPredicate(Pred, BBI.Predicate))
743     return false;
744 
745   if (BBI.BrCond.size()) {
746     if (!isTriangle)
747       return false;
748 
749     // Test predicate subsumption.
750     SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end());
751     SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
752     if (RevBranch) {
753       if (TII->ReverseBranchCondition(Cond))
754         return false;
755     }
756     if (TII->ReverseBranchCondition(RevPred) ||
757         !TII->SubsumesPredicate(Cond, RevPred))
758       return false;
759   }
760 
761   return true;
762 }
763 
764 /// AnalyzeBlock - Analyze the structure of the sub-CFG starting from
765 /// the specified block. Record its successors and whether it looks like an
766 /// if-conversion candidate.
AnalyzeBlock(MachineBasicBlock * MBB,std::vector<IfcvtToken * > & Tokens)767 void IfConverter::AnalyzeBlock(MachineBasicBlock *MBB,
768                                std::vector<IfcvtToken*> &Tokens) {
769   struct BBState {
770     BBState(MachineBasicBlock *BB) : MBB(BB), SuccsAnalyzed(false) {}
771     MachineBasicBlock *MBB;
772 
773     /// This flag is true if MBB's successors have been analyzed.
774     bool SuccsAnalyzed;
775   };
776 
777   // Push MBB to the stack.
778   SmallVector<BBState, 16> BBStack(1, MBB);
779 
780   while (!BBStack.empty()) {
781     BBState &State = BBStack.back();
782     MachineBasicBlock *BB = State.MBB;
783     BBInfo &BBI = BBAnalysis[BB->getNumber()];
784 
785     if (!State.SuccsAnalyzed) {
786       if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed) {
787         BBStack.pop_back();
788         continue;
789       }
790 
791       BBI.BB = BB;
792       BBI.IsBeingAnalyzed = true;
793 
794       ScanInstructions(BBI);
795 
796       // Unanalyzable or ends with fallthrough or unconditional branch, or if is
797       // not considered for ifcvt anymore.
798       if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) {
799         BBI.IsBeingAnalyzed = false;
800         BBI.IsAnalyzed = true;
801         BBStack.pop_back();
802         continue;
803       }
804 
805       // Do not ifcvt if either path is a back edge to the entry block.
806       if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
807         BBI.IsBeingAnalyzed = false;
808         BBI.IsAnalyzed = true;
809         BBStack.pop_back();
810         continue;
811       }
812 
813       // Do not ifcvt if true and false fallthrough blocks are the same.
814       if (!BBI.FalseBB) {
815         BBI.IsBeingAnalyzed = false;
816         BBI.IsAnalyzed = true;
817         BBStack.pop_back();
818         continue;
819       }
820 
821       // Push the False and True blocks to the stack.
822       State.SuccsAnalyzed = true;
823       BBStack.push_back(BBI.FalseBB);
824       BBStack.push_back(BBI.TrueBB);
825       continue;
826     }
827 
828     BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
829     BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
830 
831     if (TrueBBI.IsDone && FalseBBI.IsDone) {
832       BBI.IsBeingAnalyzed = false;
833       BBI.IsAnalyzed = true;
834       BBStack.pop_back();
835       continue;
836     }
837 
838     SmallVector<MachineOperand, 4>
839         RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
840     bool CanRevCond = !TII->ReverseBranchCondition(RevCond);
841 
842     unsigned Dups = 0;
843     unsigned Dups2 = 0;
844     bool TNeedSub = !TrueBBI.Predicate.empty();
845     bool FNeedSub = !FalseBBI.Predicate.empty();
846     bool Enqueued = false;
847 
848     BranchProbability Prediction = MBPI->getEdgeProbability(BB, TrueBBI.BB);
849 
850     if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) &&
851         MeetIfcvtSizeLimit(*TrueBBI.BB, (TrueBBI.NonPredSize - (Dups + Dups2) +
852                                          TrueBBI.ExtraCost), TrueBBI.ExtraCost2,
853                            *FalseBBI.BB, (FalseBBI.NonPredSize - (Dups + Dups2) +
854                                         FalseBBI.ExtraCost),FalseBBI.ExtraCost2,
855                          Prediction) &&
856         FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
857         FeasibilityAnalysis(FalseBBI, RevCond)) {
858       // Diamond:
859       //   EBB
860       //   / \_
861       //  |   |
862       // TBB FBB
863       //   \ /
864       //  TailBB
865       // Note TailBB can be empty.
866       Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups,
867                                       Dups2));
868       Enqueued = true;
869     }
870 
871     if (ValidTriangle(TrueBBI, FalseBBI, false, Dups, Prediction) &&
872         MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
873                            TrueBBI.ExtraCost2, Prediction) &&
874         FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
875       // Triangle:
876       //   EBB
877       //   | \_
878       //   |  |
879       //   | TBB
880       //   |  /
881       //   FBB
882       Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups));
883       Enqueued = true;
884     }
885 
886     if (ValidTriangle(TrueBBI, FalseBBI, true, Dups, Prediction) &&
887         MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
888                            TrueBBI.ExtraCost2, Prediction) &&
889         FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
890       Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups));
891       Enqueued = true;
892     }
893 
894     if (ValidSimple(TrueBBI, Dups, Prediction) &&
895         MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
896                            TrueBBI.ExtraCost2, Prediction) &&
897         FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
898       // Simple (split, no rejoin):
899       //   EBB
900       //   | \_
901       //   |  |
902       //   | TBB---> exit
903       //   |
904       //   FBB
905       Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups));
906       Enqueued = true;
907     }
908 
909     if (CanRevCond) {
910       // Try the other path...
911       if (ValidTriangle(FalseBBI, TrueBBI, false, Dups,
912                         Prediction.getCompl()) &&
913           MeetIfcvtSizeLimit(*FalseBBI.BB,
914                              FalseBBI.NonPredSize + FalseBBI.ExtraCost,
915                              FalseBBI.ExtraCost2, Prediction.getCompl()) &&
916           FeasibilityAnalysis(FalseBBI, RevCond, true)) {
917         Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups));
918         Enqueued = true;
919       }
920 
921       if (ValidTriangle(FalseBBI, TrueBBI, true, Dups,
922                         Prediction.getCompl()) &&
923           MeetIfcvtSizeLimit(*FalseBBI.BB,
924                              FalseBBI.NonPredSize + FalseBBI.ExtraCost,
925                            FalseBBI.ExtraCost2, Prediction.getCompl()) &&
926         FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
927         Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups));
928         Enqueued = true;
929       }
930 
931       if (ValidSimple(FalseBBI, Dups, Prediction.getCompl()) &&
932           MeetIfcvtSizeLimit(*FalseBBI.BB,
933                              FalseBBI.NonPredSize + FalseBBI.ExtraCost,
934                              FalseBBI.ExtraCost2, Prediction.getCompl()) &&
935           FeasibilityAnalysis(FalseBBI, RevCond)) {
936         Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups));
937         Enqueued = true;
938       }
939     }
940 
941     BBI.IsEnqueued = Enqueued;
942     BBI.IsBeingAnalyzed = false;
943     BBI.IsAnalyzed = true;
944     BBStack.pop_back();
945   }
946 }
947 
948 /// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion
949 /// candidates.
AnalyzeBlocks(MachineFunction & MF,std::vector<IfcvtToken * > & Tokens)950 void IfConverter::AnalyzeBlocks(MachineFunction &MF,
951                                 std::vector<IfcvtToken*> &Tokens) {
952   for (auto &BB : MF)
953     AnalyzeBlock(&BB, Tokens);
954 
955   // Sort to favor more complex ifcvt scheme.
956   std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
957 }
958 
959 /// canFallThroughTo - Returns true either if ToBB is the next block after BB or
960 /// that all the intervening blocks are empty (given BB can fall through to its
961 /// next block).
canFallThroughTo(MachineBasicBlock * BB,MachineBasicBlock * ToBB)962 static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
963   MachineFunction::iterator PI = BB->getIterator();
964   MachineFunction::iterator I = std::next(PI);
965   MachineFunction::iterator TI = ToBB->getIterator();
966   MachineFunction::iterator E = BB->getParent()->end();
967   while (I != TI) {
968     // Check isSuccessor to avoid case where the next block is empty, but
969     // it's not a successor.
970     if (I == E || !I->empty() || !PI->isSuccessor(&*I))
971       return false;
972     PI = I++;
973   }
974   return true;
975 }
976 
977 /// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed
978 /// to determine if it can be if-converted. If predecessor is already enqueued,
979 /// dequeue it!
InvalidatePreds(MachineBasicBlock * BB)980 void IfConverter::InvalidatePreds(MachineBasicBlock *BB) {
981   for (const auto &Predecessor : BB->predecessors()) {
982     BBInfo &PBBI = BBAnalysis[Predecessor->getNumber()];
983     if (PBBI.IsDone || PBBI.BB == BB)
984       continue;
985     PBBI.IsAnalyzed = false;
986     PBBI.IsEnqueued = false;
987   }
988 }
989 
990 /// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB.
991 ///
InsertUncondBranch(MachineBasicBlock * BB,MachineBasicBlock * ToBB,const TargetInstrInfo * TII)992 static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
993                                const TargetInstrInfo *TII) {
994   DebugLoc dl;  // FIXME: this is nowhere
995   SmallVector<MachineOperand, 0> NoCond;
996   TII->InsertBranch(*BB, ToBB, nullptr, NoCond, dl);
997 }
998 
999 /// RemoveExtraEdges - Remove true / false edges if either / both are no longer
1000 /// successors.
RemoveExtraEdges(BBInfo & BBI)1001 void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
1002   MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1003   SmallVector<MachineOperand, 4> Cond;
1004   if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
1005     BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
1006 }
1007 
1008 /// Behaves like LiveRegUnits::StepForward() but also adds implicit uses to all
1009 /// values defined in MI which are not live/used by MI.
UpdatePredRedefs(MachineInstr * MI,LivePhysRegs & Redefs)1010 static void UpdatePredRedefs(MachineInstr *MI, LivePhysRegs &Redefs) {
1011   SmallVector<std::pair<unsigned, const MachineOperand*>, 4> Clobbers;
1012   Redefs.stepForward(*MI, Clobbers);
1013 
1014   // Now add the implicit uses for each of the clobbered values.
1015   for (auto Reg : Clobbers) {
1016     // FIXME: Const cast here is nasty, but better than making StepForward
1017     // take a mutable instruction instead of const.
1018     MachineOperand &Op = const_cast<MachineOperand&>(*Reg.second);
1019     MachineInstr *OpMI = Op.getParent();
1020     MachineInstrBuilder MIB(*OpMI->getParent()->getParent(), OpMI);
1021     if (Op.isRegMask()) {
1022       // First handle regmasks.  They clobber any entries in the mask which
1023       // means that we need a def for those registers.
1024       MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
1025 
1026       // We also need to add an implicit def of this register for the later
1027       // use to read from.
1028       // For the register allocator to have allocated a register clobbered
1029       // by the call which is used later, it must be the case that
1030       // the call doesn't return.
1031       MIB.addReg(Reg.first, RegState::Implicit | RegState::Define);
1032       continue;
1033     }
1034     assert(Op.isReg() && "Register operand required");
1035     if (Op.isDead()) {
1036       // If we found a dead def, but it needs to be live, then remove the dead
1037       // flag.
1038       if (Redefs.contains(Op.getReg()))
1039         Op.setIsDead(false);
1040     }
1041     MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
1042   }
1043 }
1044 
1045 /**
1046  * Remove kill flags from operands with a registers in the @p DontKill set.
1047  */
RemoveKills(MachineInstr & MI,const LivePhysRegs & DontKill)1048 static void RemoveKills(MachineInstr &MI, const LivePhysRegs &DontKill) {
1049   for (MIBundleOperands O(&MI); O.isValid(); ++O) {
1050     if (!O->isReg() || !O->isKill())
1051       continue;
1052     if (DontKill.contains(O->getReg()))
1053       O->setIsKill(false);
1054   }
1055 }
1056 
1057 /**
1058  * Walks a range of machine instructions and removes kill flags for registers
1059  * in the @p DontKill set.
1060  */
RemoveKills(MachineBasicBlock::iterator I,MachineBasicBlock::iterator E,const LivePhysRegs & DontKill,const MCRegisterInfo & MCRI)1061 static void RemoveKills(MachineBasicBlock::iterator I,
1062                         MachineBasicBlock::iterator E,
1063                         const LivePhysRegs &DontKill,
1064                         const MCRegisterInfo &MCRI) {
1065   for ( ; I != E; ++I)
1066     RemoveKills(*I, DontKill);
1067 }
1068 
1069 /// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG.
1070 ///
IfConvertSimple(BBInfo & BBI,IfcvtKind Kind)1071 bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
1072   BBInfo &TrueBBI  = BBAnalysis[BBI.TrueBB->getNumber()];
1073   BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1074   BBInfo *CvtBBI = &TrueBBI;
1075   BBInfo *NextBBI = &FalseBBI;
1076 
1077   SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1078   if (Kind == ICSimpleFalse)
1079     std::swap(CvtBBI, NextBBI);
1080 
1081   if (CvtBBI->IsDone ||
1082       (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1083     // Something has changed. It's no longer safe to predicate this block.
1084     BBI.IsAnalyzed = false;
1085     CvtBBI->IsAnalyzed = false;
1086     return false;
1087   }
1088 
1089   if (CvtBBI->BB->hasAddressTaken())
1090     // Conservatively abort if-conversion if BB's address is taken.
1091     return false;
1092 
1093   if (Kind == ICSimpleFalse)
1094     if (TII->ReverseBranchCondition(Cond))
1095       llvm_unreachable("Unable to reverse branch condition!");
1096 
1097   // Initialize liveins to the first BB. These are potentiall redefined by
1098   // predicated instructions.
1099   Redefs.init(TRI);
1100   Redefs.addLiveIns(CvtBBI->BB);
1101   Redefs.addLiveIns(NextBBI->BB);
1102 
1103   // Compute a set of registers which must not be killed by instructions in
1104   // BB1: This is everything live-in to BB2.
1105   DontKill.init(TRI);
1106   DontKill.addLiveIns(NextBBI->BB);
1107 
1108   if (CvtBBI->BB->pred_size() > 1) {
1109     BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1110     // Copy instructions in the true block, predicate them, and add them to
1111     // the entry block.
1112     CopyAndPredicateBlock(BBI, *CvtBBI, Cond);
1113 
1114     // RemoveExtraEdges won't work if the block has an unanalyzable branch, so
1115     // explicitly remove CvtBBI as a successor.
1116     BBI.BB->removeSuccessor(CvtBBI->BB, true);
1117   } else {
1118     RemoveKills(CvtBBI->BB->begin(), CvtBBI->BB->end(), DontKill, *TRI);
1119     PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond);
1120 
1121     // Merge converted block into entry block.
1122     BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1123     MergeBlocks(BBI, *CvtBBI);
1124   }
1125 
1126   bool IterIfcvt = true;
1127   if (!canFallThroughTo(BBI.BB, NextBBI->BB)) {
1128     InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1129     BBI.HasFallThrough = false;
1130     // Now ifcvt'd block will look like this:
1131     // BB:
1132     // ...
1133     // t, f = cmp
1134     // if t op
1135     // b BBf
1136     //
1137     // We cannot further ifcvt this block because the unconditional branch
1138     // will have to be predicated on the new condition, that will not be
1139     // available if cmp executes.
1140     IterIfcvt = false;
1141   }
1142 
1143   RemoveExtraEdges(BBI);
1144 
1145   // Update block info. BB can be iteratively if-converted.
1146   if (!IterIfcvt)
1147     BBI.IsDone = true;
1148   InvalidatePreds(BBI.BB);
1149   CvtBBI->IsDone = true;
1150 
1151   // FIXME: Must maintain LiveIns.
1152   return true;
1153 }
1154 
1155 /// IfConvertTriangle - If convert a triangle sub-CFG.
1156 ///
IfConvertTriangle(BBInfo & BBI,IfcvtKind Kind)1157 bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
1158   BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1159   BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1160   BBInfo *CvtBBI = &TrueBBI;
1161   BBInfo *NextBBI = &FalseBBI;
1162   DebugLoc dl;  // FIXME: this is nowhere
1163 
1164   SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1165   if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1166     std::swap(CvtBBI, NextBBI);
1167 
1168   if (CvtBBI->IsDone ||
1169       (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1170     // Something has changed. It's no longer safe to predicate this block.
1171     BBI.IsAnalyzed = false;
1172     CvtBBI->IsAnalyzed = false;
1173     return false;
1174   }
1175 
1176   if (CvtBBI->BB->hasAddressTaken())
1177     // Conservatively abort if-conversion if BB's address is taken.
1178     return false;
1179 
1180   if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1181     if (TII->ReverseBranchCondition(Cond))
1182       llvm_unreachable("Unable to reverse branch condition!");
1183 
1184   if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
1185     if (ReverseBranchCondition(*CvtBBI)) {
1186       // BB has been changed, modify its predecessors (except for this
1187       // one) so they don't get ifcvt'ed based on bad intel.
1188       for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(),
1189              E = CvtBBI->BB->pred_end(); PI != E; ++PI) {
1190         MachineBasicBlock *PBB = *PI;
1191         if (PBB == BBI.BB)
1192           continue;
1193         BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
1194         if (PBBI.IsEnqueued) {
1195           PBBI.IsAnalyzed = false;
1196           PBBI.IsEnqueued = false;
1197         }
1198       }
1199     }
1200   }
1201 
1202   // Initialize liveins to the first BB. These are potentially redefined by
1203   // predicated instructions.
1204   Redefs.init(TRI);
1205   Redefs.addLiveIns(CvtBBI->BB);
1206   Redefs.addLiveIns(NextBBI->BB);
1207 
1208   DontKill.clear();
1209 
1210   bool HasEarlyExit = CvtBBI->FalseBB != nullptr;
1211   BranchProbability CvtNext, CvtFalse, BBNext, BBCvt;
1212 
1213   if (HasEarlyExit) {
1214     // Get probabilities before modifying CvtBBI->BB and BBI.BB.
1215     CvtNext = MBPI->getEdgeProbability(CvtBBI->BB, NextBBI->BB);
1216     CvtFalse = MBPI->getEdgeProbability(CvtBBI->BB, CvtBBI->FalseBB);
1217     BBNext = MBPI->getEdgeProbability(BBI.BB, NextBBI->BB);
1218     BBCvt = MBPI->getEdgeProbability(BBI.BB, CvtBBI->BB);
1219   }
1220 
1221   if (CvtBBI->BB->pred_size() > 1) {
1222     BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1223     // Copy instructions in the true block, predicate them, and add them to
1224     // the entry block.
1225     CopyAndPredicateBlock(BBI, *CvtBBI, Cond, true);
1226 
1227     // RemoveExtraEdges won't work if the block has an unanalyzable branch, so
1228     // explicitly remove CvtBBI as a successor.
1229     BBI.BB->removeSuccessor(CvtBBI->BB, true);
1230   } else {
1231     // Predicate the 'true' block after removing its branch.
1232     CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
1233     PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond);
1234 
1235     // Now merge the entry of the triangle with the true block.
1236     BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1237     MergeBlocks(BBI, *CvtBBI, false);
1238   }
1239 
1240   // If 'true' block has a 'false' successor, add an exit branch to it.
1241   if (HasEarlyExit) {
1242     SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1243                                            CvtBBI->BrCond.end());
1244     if (TII->ReverseBranchCondition(RevCond))
1245       llvm_unreachable("Unable to reverse branch condition!");
1246 
1247     // Update the edge probability for both CvtBBI->FalseBB and NextBBI.
1248     // NewNext = New_Prob(BBI.BB, NextBBI->BB) =
1249     //   Prob(BBI.BB, NextBBI->BB) +
1250     //   Prob(BBI.BB, CvtBBI->BB) * Prob(CvtBBI->BB, NextBBI->BB)
1251     // NewFalse = New_Prob(BBI.BB, CvtBBI->FalseBB) =
1252     //   Prob(BBI.BB, CvtBBI->BB) * Prob(CvtBBI->BB, CvtBBI->FalseBB)
1253     auto NewTrueBB = getNextBlock(BBI.BB);
1254     auto NewNext = BBNext + BBCvt * CvtNext;
1255     auto NewTrueBBIter =
1256         std::find(BBI.BB->succ_begin(), BBI.BB->succ_end(), NewTrueBB);
1257     if (NewTrueBBIter != BBI.BB->succ_end())
1258       BBI.BB->setSuccProbability(NewTrueBBIter, NewNext);
1259 
1260     auto NewFalse = BBCvt * CvtFalse;
1261     TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl);
1262     BBI.BB->addSuccessor(CvtBBI->FalseBB, NewFalse);
1263   }
1264 
1265   // Merge in the 'false' block if the 'false' block has no other
1266   // predecessors. Otherwise, add an unconditional branch to 'false'.
1267   bool FalseBBDead = false;
1268   bool IterIfcvt = true;
1269   bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB);
1270   if (!isFallThrough) {
1271     // Only merge them if the true block does not fallthrough to the false
1272     // block. By not merging them, we make it possible to iteratively
1273     // ifcvt the blocks.
1274     if (!HasEarlyExit &&
1275         NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough &&
1276         !NextBBI->BB->hasAddressTaken()) {
1277       MergeBlocks(BBI, *NextBBI);
1278       FalseBBDead = true;
1279     } else {
1280       InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1281       BBI.HasFallThrough = false;
1282     }
1283     // Mixed predicated and unpredicated code. This cannot be iteratively
1284     // predicated.
1285     IterIfcvt = false;
1286   }
1287 
1288   RemoveExtraEdges(BBI);
1289 
1290   // Update block info. BB can be iteratively if-converted.
1291   if (!IterIfcvt)
1292     BBI.IsDone = true;
1293   InvalidatePreds(BBI.BB);
1294   CvtBBI->IsDone = true;
1295   if (FalseBBDead)
1296     NextBBI->IsDone = true;
1297 
1298   // FIXME: Must maintain LiveIns.
1299   return true;
1300 }
1301 
1302 /// IfConvertDiamond - If convert a diamond sub-CFG.
1303 ///
IfConvertDiamond(BBInfo & BBI,IfcvtKind Kind,unsigned NumDups1,unsigned NumDups2)1304 bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
1305                                    unsigned NumDups1, unsigned NumDups2) {
1306   BBInfo &TrueBBI  = BBAnalysis[BBI.TrueBB->getNumber()];
1307   BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1308   MachineBasicBlock *TailBB = TrueBBI.TrueBB;
1309   // True block must fall through or end with an unanalyzable terminator.
1310   if (!TailBB) {
1311     if (blockAlwaysFallThrough(TrueBBI))
1312       TailBB = FalseBBI.TrueBB;
1313     assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!");
1314   }
1315 
1316   if (TrueBBI.IsDone || FalseBBI.IsDone ||
1317       TrueBBI.BB->pred_size() > 1 ||
1318       FalseBBI.BB->pred_size() > 1) {
1319     // Something has changed. It's no longer safe to predicate these blocks.
1320     BBI.IsAnalyzed = false;
1321     TrueBBI.IsAnalyzed = false;
1322     FalseBBI.IsAnalyzed = false;
1323     return false;
1324   }
1325 
1326   if (TrueBBI.BB->hasAddressTaken() || FalseBBI.BB->hasAddressTaken())
1327     // Conservatively abort if-conversion if either BB has its address taken.
1328     return false;
1329 
1330   // Put the predicated instructions from the 'true' block before the
1331   // instructions from the 'false' block, unless the true block would clobber
1332   // the predicate, in which case, do the opposite.
1333   BBInfo *BBI1 = &TrueBBI;
1334   BBInfo *BBI2 = &FalseBBI;
1335   SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1336   if (TII->ReverseBranchCondition(RevCond))
1337     llvm_unreachable("Unable to reverse branch condition!");
1338   SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;
1339   SmallVector<MachineOperand, 4> *Cond2 = &RevCond;
1340 
1341   // Figure out the more profitable ordering.
1342   bool DoSwap = false;
1343   if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred)
1344     DoSwap = true;
1345   else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) {
1346     if (TrueBBI.NonPredSize > FalseBBI.NonPredSize)
1347       DoSwap = true;
1348   }
1349   if (DoSwap) {
1350     std::swap(BBI1, BBI2);
1351     std::swap(Cond1, Cond2);
1352   }
1353 
1354   // Remove the conditional branch from entry to the blocks.
1355   BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1356 
1357   // Initialize liveins to the first BB. These are potentially redefined by
1358   // predicated instructions.
1359   Redefs.init(TRI);
1360   Redefs.addLiveIns(BBI1->BB);
1361 
1362   // Remove the duplicated instructions at the beginnings of both paths.
1363   // Skip dbg_value instructions
1364   MachineBasicBlock::iterator DI1 = BBI1->BB->getFirstNonDebugInstr();
1365   MachineBasicBlock::iterator DI2 = BBI2->BB->getFirstNonDebugInstr();
1366   BBI1->NonPredSize -= NumDups1;
1367   BBI2->NonPredSize -= NumDups1;
1368 
1369   // Skip past the dups on each side separately since there may be
1370   // differing dbg_value entries.
1371   for (unsigned i = 0; i < NumDups1; ++DI1) {
1372     if (!DI1->isDebugValue())
1373       ++i;
1374   }
1375   while (NumDups1 != 0) {
1376     ++DI2;
1377     if (!DI2->isDebugValue())
1378       --NumDups1;
1379   }
1380 
1381   // Compute a set of registers which must not be killed by instructions in BB1:
1382   // This is everything used+live in BB2 after the duplicated instructions. We
1383   // can compute this set by simulating liveness backwards from the end of BB2.
1384   DontKill.init(TRI);
1385   for (MachineBasicBlock::reverse_iterator I = BBI2->BB->rbegin(),
1386        E = MachineBasicBlock::reverse_iterator(DI2); I != E; ++I) {
1387     DontKill.stepBackward(*I);
1388   }
1389 
1390   for (MachineBasicBlock::const_iterator I = BBI1->BB->begin(), E = DI1; I != E;
1391        ++I) {
1392     SmallVector<std::pair<unsigned, const MachineOperand*>, 4> IgnoredClobbers;
1393     Redefs.stepForward(*I, IgnoredClobbers);
1394   }
1395   BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
1396   BBI2->BB->erase(BBI2->BB->begin(), DI2);
1397 
1398   // Remove branch from 'true' block and remove duplicated instructions.
1399   BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB);
1400   DI1 = BBI1->BB->end();
1401   for (unsigned i = 0; i != NumDups2; ) {
1402     // NumDups2 only counted non-dbg_value instructions, so this won't
1403     // run off the head of the list.
1404     assert (DI1 != BBI1->BB->begin());
1405     --DI1;
1406     // skip dbg_value instructions
1407     if (!DI1->isDebugValue())
1408       ++i;
1409   }
1410   BBI1->BB->erase(DI1, BBI1->BB->end());
1411 
1412   // Kill flags in the true block for registers living into the false block
1413   // must be removed.
1414   RemoveKills(BBI1->BB->begin(), BBI1->BB->end(), DontKill, *TRI);
1415 
1416   // Remove 'false' block branch and find the last instruction to predicate.
1417   BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB);
1418   DI2 = BBI2->BB->end();
1419   while (NumDups2 != 0) {
1420     // NumDups2 only counted non-dbg_value instructions, so this won't
1421     // run off the head of the list.
1422     assert (DI2 != BBI2->BB->begin());
1423     --DI2;
1424     // skip dbg_value instructions
1425     if (!DI2->isDebugValue())
1426       --NumDups2;
1427   }
1428 
1429   // Remember which registers would later be defined by the false block.
1430   // This allows us not to predicate instructions in the true block that would
1431   // later be re-defined. That is, rather than
1432   //   subeq  r0, r1, #1
1433   //   addne  r0, r1, #1
1434   // generate:
1435   //   sub    r0, r1, #1
1436   //   addne  r0, r1, #1
1437   SmallSet<unsigned, 4> RedefsByFalse;
1438   SmallSet<unsigned, 4> ExtUses;
1439   if (TII->isProfitableToUnpredicate(*BBI1->BB, *BBI2->BB)) {
1440     for (MachineBasicBlock::iterator FI = BBI2->BB->begin(); FI != DI2; ++FI) {
1441       if (FI->isDebugValue())
1442         continue;
1443       SmallVector<unsigned, 4> Defs;
1444       for (unsigned i = 0, e = FI->getNumOperands(); i != e; ++i) {
1445         const MachineOperand &MO = FI->getOperand(i);
1446         if (!MO.isReg())
1447           continue;
1448         unsigned Reg = MO.getReg();
1449         if (!Reg)
1450           continue;
1451         if (MO.isDef()) {
1452           Defs.push_back(Reg);
1453         } else if (!RedefsByFalse.count(Reg)) {
1454           // These are defined before ctrl flow reach the 'false' instructions.
1455           // They cannot be modified by the 'true' instructions.
1456           for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1457                SubRegs.isValid(); ++SubRegs)
1458             ExtUses.insert(*SubRegs);
1459         }
1460       }
1461 
1462       for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
1463         unsigned Reg = Defs[i];
1464         if (!ExtUses.count(Reg)) {
1465           for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1466                SubRegs.isValid(); ++SubRegs)
1467             RedefsByFalse.insert(*SubRegs);
1468         }
1469       }
1470     }
1471   }
1472 
1473   // Predicate the 'true' block.
1474   PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, &RedefsByFalse);
1475 
1476   // Predicate the 'false' block.
1477   PredicateBlock(*BBI2, DI2, *Cond2);
1478 
1479   // Merge the true block into the entry of the diamond.
1480   MergeBlocks(BBI, *BBI1, TailBB == nullptr);
1481   MergeBlocks(BBI, *BBI2, TailBB == nullptr);
1482 
1483   // If the if-converted block falls through or unconditionally branches into
1484   // the tail block, and the tail block does not have other predecessors, then
1485   // fold the tail block in as well. Otherwise, unless it falls through to the
1486   // tail, add a unconditional branch to it.
1487   if (TailBB) {
1488     BBInfo &TailBBI = BBAnalysis[TailBB->getNumber()];
1489     bool CanMergeTail = !TailBBI.HasFallThrough &&
1490       !TailBBI.BB->hasAddressTaken();
1491     // There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
1492     // check if there are any other predecessors besides those.
1493     unsigned NumPreds = TailBB->pred_size();
1494     if (NumPreds > 1)
1495       CanMergeTail = false;
1496     else if (NumPreds == 1 && CanMergeTail) {
1497       MachineBasicBlock::pred_iterator PI = TailBB->pred_begin();
1498       if (*PI != BBI1->BB && *PI != BBI2->BB)
1499         CanMergeTail = false;
1500     }
1501     if (CanMergeTail) {
1502       MergeBlocks(BBI, TailBBI);
1503       TailBBI.IsDone = true;
1504     } else {
1505       BBI.BB->addSuccessor(TailBB, BranchProbability::getOne());
1506       InsertUncondBranch(BBI.BB, TailBB, TII);
1507       BBI.HasFallThrough = false;
1508     }
1509   }
1510 
1511   // RemoveExtraEdges won't work if the block has an unanalyzable branch,
1512   // which can happen here if TailBB is unanalyzable and is merged, so
1513   // explicitly remove BBI1 and BBI2 as successors.
1514   BBI.BB->removeSuccessor(BBI1->BB);
1515   BBI.BB->removeSuccessor(BBI2->BB, true);
1516   RemoveExtraEdges(BBI);
1517 
1518   // Update block info.
1519   BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
1520   InvalidatePreds(BBI.BB);
1521 
1522   // FIXME: Must maintain LiveIns.
1523   return true;
1524 }
1525 
MaySpeculate(const MachineInstr * MI,SmallSet<unsigned,4> & LaterRedefs)1526 static bool MaySpeculate(const MachineInstr *MI,
1527                          SmallSet<unsigned, 4> &LaterRedefs) {
1528   bool SawStore = true;
1529   if (!MI->isSafeToMove(nullptr, SawStore))
1530     return false;
1531 
1532   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
1533     const MachineOperand &MO = MI->getOperand(i);
1534     if (!MO.isReg())
1535       continue;
1536     unsigned Reg = MO.getReg();
1537     if (!Reg)
1538       continue;
1539     if (MO.isDef() && !LaterRedefs.count(Reg))
1540       return false;
1541   }
1542 
1543   return true;
1544 }
1545 
1546 /// PredicateBlock - Predicate instructions from the start of the block to the
1547 /// specified end with the specified condition.
PredicateBlock(BBInfo & BBI,MachineBasicBlock::iterator E,SmallVectorImpl<MachineOperand> & Cond,SmallSet<unsigned,4> * LaterRedefs)1548 void IfConverter::PredicateBlock(BBInfo &BBI,
1549                                  MachineBasicBlock::iterator E,
1550                                  SmallVectorImpl<MachineOperand> &Cond,
1551                                  SmallSet<unsigned, 4> *LaterRedefs) {
1552   bool AnyUnpred = false;
1553   bool MaySpec = LaterRedefs != nullptr;
1554   for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) {
1555     if (I->isDebugValue() || TII->isPredicated(I))
1556       continue;
1557     // It may be possible not to predicate an instruction if it's the 'true'
1558     // side of a diamond and the 'false' side may re-define the instruction's
1559     // defs.
1560     if (MaySpec && MaySpeculate(I, *LaterRedefs)) {
1561       AnyUnpred = true;
1562       continue;
1563     }
1564     // If any instruction is predicated, then every instruction after it must
1565     // be predicated.
1566     MaySpec = false;
1567     if (!TII->PredicateInstruction(I, Cond)) {
1568 #ifndef NDEBUG
1569       dbgs() << "Unable to predicate " << *I << "!\n";
1570 #endif
1571       llvm_unreachable(nullptr);
1572     }
1573 
1574     // If the predicated instruction now redefines a register as the result of
1575     // if-conversion, add an implicit kill.
1576     UpdatePredRedefs(I, Redefs);
1577   }
1578 
1579   BBI.Predicate.append(Cond.begin(), Cond.end());
1580 
1581   BBI.IsAnalyzed = false;
1582   BBI.NonPredSize = 0;
1583 
1584   ++NumIfConvBBs;
1585   if (AnyUnpred)
1586     ++NumUnpred;
1587 }
1588 
1589 /// CopyAndPredicateBlock - Copy and predicate instructions from source BB to
1590 /// the destination block. Skip end of block branches if IgnoreBr is true.
CopyAndPredicateBlock(BBInfo & ToBBI,BBInfo & FromBBI,SmallVectorImpl<MachineOperand> & Cond,bool IgnoreBr)1591 void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
1592                                         SmallVectorImpl<MachineOperand> &Cond,
1593                                         bool IgnoreBr) {
1594   MachineFunction &MF = *ToBBI.BB->getParent();
1595 
1596   for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
1597          E = FromBBI.BB->end(); I != E; ++I) {
1598     // Do not copy the end of the block branches.
1599     if (IgnoreBr && I->isBranch())
1600       break;
1601 
1602     MachineInstr *MI = MF.CloneMachineInstr(I);
1603     ToBBI.BB->insert(ToBBI.BB->end(), MI);
1604     ToBBI.NonPredSize++;
1605     unsigned ExtraPredCost = TII->getPredicationCost(&*I);
1606     unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
1607     if (NumCycles > 1)
1608       ToBBI.ExtraCost += NumCycles-1;
1609     ToBBI.ExtraCost2 += ExtraPredCost;
1610 
1611     if (!TII->isPredicated(I) && !MI->isDebugValue()) {
1612       if (!TII->PredicateInstruction(MI, Cond)) {
1613 #ifndef NDEBUG
1614         dbgs() << "Unable to predicate " << *I << "!\n";
1615 #endif
1616         llvm_unreachable(nullptr);
1617       }
1618     }
1619 
1620     // If the predicated instruction now redefines a register as the result of
1621     // if-conversion, add an implicit kill.
1622     UpdatePredRedefs(MI, Redefs);
1623 
1624     // Some kill flags may not be correct anymore.
1625     if (!DontKill.empty())
1626       RemoveKills(*MI, DontKill);
1627   }
1628 
1629   if (!IgnoreBr) {
1630     std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1631                                            FromBBI.BB->succ_end());
1632     MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1633     MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : nullptr;
1634 
1635     for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1636       MachineBasicBlock *Succ = Succs[i];
1637       // Fallthrough edge can't be transferred.
1638       if (Succ == FallThrough)
1639         continue;
1640       ToBBI.BB->addSuccessor(Succ);
1641     }
1642   }
1643 
1644   ToBBI.Predicate.append(FromBBI.Predicate.begin(), FromBBI.Predicate.end());
1645   ToBBI.Predicate.append(Cond.begin(), Cond.end());
1646 
1647   ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1648   ToBBI.IsAnalyzed = false;
1649 
1650   ++NumDupBBs;
1651 }
1652 
1653 /// MergeBlocks - Move all instructions from FromBB to the end of ToBB.
1654 /// This will leave FromBB as an empty block, so remove all of its
1655 /// successor edges except for the fall-through edge.  If AddEdges is true,
1656 /// i.e., when FromBBI's branch is being moved, add those successor edges to
1657 /// ToBBI.
MergeBlocks(BBInfo & ToBBI,BBInfo & FromBBI,bool AddEdges)1658 void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) {
1659   assert(!FromBBI.BB->hasAddressTaken() &&
1660          "Removing a BB whose address is taken!");
1661 
1662   ToBBI.BB->splice(ToBBI.BB->end(),
1663                    FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end());
1664 
1665   // Force normalizing the successors' probabilities of ToBBI.BB to convert all
1666   // unknown probabilities into known ones.
1667   // FIXME: This usage is too tricky and in the future we would like to
1668   // eliminate all unknown probabilities in MBB.
1669   ToBBI.BB->normalizeSuccProbs();
1670 
1671   SmallVector<MachineBasicBlock *, 4> FromSuccs(FromBBI.BB->succ_begin(),
1672                                                 FromBBI.BB->succ_end());
1673   MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1674   MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : nullptr;
1675   // The edge probability from ToBBI.BB to FromBBI.BB, which is only needed when
1676   // AddEdges is true and FromBBI.BB is a successor of ToBBI.BB.
1677   auto To2FromProb = BranchProbability::getZero();
1678   if (AddEdges && ToBBI.BB->isSuccessor(FromBBI.BB)) {
1679     To2FromProb = MBPI->getEdgeProbability(ToBBI.BB, FromBBI.BB);
1680     // Set the edge probability from ToBBI.BB to FromBBI.BB to zero to avoid the
1681     // edge probability being merged to other edges when this edge is removed
1682     // later.
1683     ToBBI.BB->setSuccProbability(
1684         std::find(ToBBI.BB->succ_begin(), ToBBI.BB->succ_end(), FromBBI.BB),
1685         BranchProbability::getZero());
1686   }
1687 
1688   for (unsigned i = 0, e = FromSuccs.size(); i != e; ++i) {
1689     MachineBasicBlock *Succ = FromSuccs[i];
1690     // Fallthrough edge can't be transferred.
1691     if (Succ == FallThrough)
1692       continue;
1693 
1694     auto NewProb = BranchProbability::getZero();
1695     if (AddEdges) {
1696       // Calculate the edge probability for the edge from ToBBI.BB to Succ,
1697       // which is a portion of the edge probability from FromBBI.BB to Succ. The
1698       // portion ratio is the edge probability from ToBBI.BB to FromBBI.BB (if
1699       // FromBBI is a successor of ToBBI.BB. See comment below for excepion).
1700       NewProb = MBPI->getEdgeProbability(FromBBI.BB, Succ);
1701 
1702       // To2FromProb is 0 when FromBBI.BB is not a successor of ToBBI.BB. This
1703       // only happens when if-converting a diamond CFG and FromBBI.BB is the
1704       // tail BB.  In this case FromBBI.BB post-dominates ToBBI.BB and hence we
1705       // could just use the probabilities on FromBBI.BB's out-edges when adding
1706       // new successors.
1707       if (!To2FromProb.isZero())
1708         NewProb *= To2FromProb;
1709     }
1710 
1711     FromBBI.BB->removeSuccessor(Succ);
1712 
1713     if (AddEdges) {
1714       // If the edge from ToBBI.BB to Succ already exists, update the
1715       // probability of this edge by adding NewProb to it. An example is shown
1716       // below, in which A is ToBBI.BB and B is FromBBI.BB. In this case we
1717       // don't have to set C as A's successor as it already is. We only need to
1718       // update the edge probability on A->C. Note that B will not be
1719       // immediately removed from A's successors. It is possible that B->D is
1720       // not removed either if D is a fallthrough of B. Later the edge A->D
1721       // (generated here) and B->D will be combined into one edge. To maintain
1722       // correct edge probability of this combined edge, we need to set the edge
1723       // probability of A->B to zero, which is already done above. The edge
1724       // probability on A->D is calculated by scaling the original probability
1725       // on A->B by the probability of B->D.
1726       //
1727       // Before ifcvt:      After ifcvt (assume B->D is kept):
1728       //
1729       //       A                A
1730       //      /|               /|\
1731       //     / B              / B|
1732       //    | /|             |  ||
1733       //    |/ |             |  |/
1734       //    C  D             C  D
1735       //
1736       if (ToBBI.BB->isSuccessor(Succ))
1737         ToBBI.BB->setSuccProbability(
1738             std::find(ToBBI.BB->succ_begin(), ToBBI.BB->succ_end(), Succ),
1739             MBPI->getEdgeProbability(ToBBI.BB, Succ) + NewProb);
1740       else
1741         ToBBI.BB->addSuccessor(Succ, NewProb);
1742     }
1743   }
1744 
1745   // Now FromBBI always falls through to the next block!
1746   if (NBB && !FromBBI.BB->isSuccessor(NBB))
1747     FromBBI.BB->addSuccessor(NBB);
1748 
1749   // Normalize the probabilities of ToBBI.BB's successors with all adjustment
1750   // we've done above.
1751   ToBBI.BB->normalizeSuccProbs();
1752 
1753   ToBBI.Predicate.append(FromBBI.Predicate.begin(), FromBBI.Predicate.end());
1754   FromBBI.Predicate.clear();
1755 
1756   ToBBI.NonPredSize += FromBBI.NonPredSize;
1757   ToBBI.ExtraCost += FromBBI.ExtraCost;
1758   ToBBI.ExtraCost2 += FromBBI.ExtraCost2;
1759   FromBBI.NonPredSize = 0;
1760   FromBBI.ExtraCost = 0;
1761   FromBBI.ExtraCost2 = 0;
1762 
1763   ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1764   ToBBI.HasFallThrough = FromBBI.HasFallThrough;
1765   ToBBI.IsAnalyzed = false;
1766   FromBBI.IsAnalyzed = false;
1767 }
1768 
1769 FunctionPass *
createIfConverter(std::function<bool (const Function &)> Ftor)1770 llvm::createIfConverter(std::function<bool(const Function &)> Ftor) {
1771   return new IfConverter(Ftor);
1772 }
1773