Searched defs:LoadFpuFromOffset (Results 1 – 3 of 3) sorted by relevance
| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 1299 TEST_F(AssemblerMIPS64Test, LoadFpuFromOffset) { in TEST_F() argument 1300 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0); in TEST_F() local 1301 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 4); in TEST_F() local 1302 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 256); in TEST_F() local 1303 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x7FFC); in TEST_F() local 1304 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x8000); in TEST_F() local 1305 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x8004); in TEST_F() local 1306 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x10000); in TEST_F() local 1307 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, 0x12345678); in TEST_F() local 1308 __ LoadFpuFromOffset(mips64::kLoadWord, mips64::F0, mips64::A0, -256); in TEST_F() local [all …]
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| D | assembler_mips64.cc | 1848 void Mips64Assembler::LoadFpuFromOffset(LoadOperandType type, FpuRegister reg, GpuRegister base, in LoadFpuFromOffset() function in art::mips64::Mips64Assembler
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.cc | 667 __ LoadFpuFromOffset(load_type, in MoveLocation() local 945 __ LoadFpuFromOffset(kLoadDoubleword, FpuRegister(reg_id), SP, stack_index); in RestoreFloatingPointRegister() local 1390 __ LoadFpuFromOffset(kLoadWord, out, obj, offset); in VisitArrayGet() local 1394 __ LoadFpuFromOffset(kLoadWord, out, TMP, data_offset); in VisitArrayGet() local 1405 __ LoadFpuFromOffset(kLoadDoubleword, out, obj, offset); in VisitArrayGet() local 1409 __ LoadFpuFromOffset(kLoadDoubleword, out, TMP, data_offset); in VisitArrayGet() local 2765 __ LoadFpuFromOffset(load_type, dst, obj, field_info.GetFieldOffset().Uint32Value()); in HandleFieldGet() local
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