| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonCFGOptimizer.cpp | 74 int NewOpcode = 0; in InvertAndChangeJumpTarget() local
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| D | HexagonVLIWPacketizer.cpp | 416 int NewOpcode; in promoteToDotNew() local
426 int NewOpcode = HII->getDotOldOp(MI->getOpcode()); in demoteToDotOld() local
762 int NewOpcode = HII->getDotNewOp(MI); in canPromoteToDotNew() local
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| D | HexagonInstrInfo.cpp | 1017 unsigned NewOpcode = getInvertedPredicatedOpcode(opcode); in ReverseBranchCondition() local
3135 int NewOpcode = Hexagon::getPredNewOpcode(MI->getOpcode()); in getDotNewPredOp() local
3765 unsigned NewOpcode = getInvertedPredicatedOpcode(MI->getOpcode()); in invertAndChangeJumpTarget() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDILCFGStructurizer.cpp | 472 int NewOpcode, DebugLoc DL) { in insertInstrEnd()
481 int NewOpcode, DebugLoc DL) { in insertInstrBefore()
493 MachineBasicBlock::iterator I, int NewOpcode) { in insertInstrBefore()
505 MachineBasicBlock::iterator I, int NewOpcode, DebugLoc DL) { in insertCondBranchBefore()
518 MachineBasicBlock::iterator I, int NewOpcode, int RegNum, in insertCondBranchBefore()
529 int NewOpcode, int RegNum) { in insertCondBranchEnd()
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| D | SIInstrInfo.cpp | 2348 unsigned NewOpcode = getVALUOp(*MI); in moveSMRDToVALU() local
2455 unsigned NewOpcode = getVALUOp(*Inst); in moveToVALU() local
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| D | SIISelLowering.cpp | 2356 unsigned NewOpcode = TII->getMaskedMIMGOp(MI->getOpcode(), BitsSet); in AdjustInstrPostInstrSelection() local
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreRegisterInfo.cpp | 138 int NewOpcode; in InsertSPImmInst() local
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| /external/llvm/lib/Target/X86/ |
| D | X86FixupLEAs.cpp | 264 int NewOpcode; in fixupIncDec() local
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| D | X86MCInstLower.cpp | 322 unsigned NewOpcode = 0; in SimplifyMOVSX() local
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| D | X86InstrInfo.cpp | 4924 unsigned NewOpcode = 0; in optimizeCompareInstr() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCAsmPrinter.cpp | 980 unsigned NewOpcode = in EmitInstruction() local
994 unsigned NewOpcode = in EmitInstruction() local
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| D | PPCRegisterInfo.cpp | 881 unsigned NewOpcode = ImmToIdxMap.find(OpC)->second; in eliminateFrameIndex() local
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| D | PPCISelDAGToDAG.cpp | 4118 unsigned NewOpcode; in PeepholePPC64ZExt() local
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 96 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset); in splitAdjDynAlloc() local
731 unsigned NewOpcode; in convertToThreeAddress() local
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| D | SystemZFrameLowering.cpp | 438 unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset); in emitEpilogue() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 513 unsigned NewOpcode = in replaceWithCompactBranch() local
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 183 int NewOpcode = -1; in encodeInstruction() local
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| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 1634 std::string NewOpcode; in ParseInstruction() local
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2633 unsigned NewOpcode = Opcode == Mips::SWM_MM ? Mips::SWM32_MM : Mips::LWM32_MM; in expandLoadStoreMultiple() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 4158 unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND; in visitXOR() local
4170 unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND; in visitXOR() local
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