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Searched defs:StoreFpuToOffset (Results 1 – 3 of 3) sorted by relevance

/art/compiler/utils/mips64/
Dassembler_mips64_test.cc1555 TEST_F(AssemblerMIPS64Test, StoreFpuToOffset) { in TEST_F() argument
1556 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0); in TEST_F() local
1557 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 4); in TEST_F() local
1558 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 256); in TEST_F() local
1559 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x7FFC); in TEST_F() local
1560 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x8000); in TEST_F() local
1561 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x8004); in TEST_F() local
1562 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x10000); in TEST_F() local
1563 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, 0x12345678); in TEST_F() local
1564 __ StoreFpuToOffset(mips64::kStoreWord, mips64::F0, mips64::A0, -256); in TEST_F() local
[all …]
Dassembler_mips64.cc1943 void Mips64Assembler::StoreFpuToOffset(StoreOperandType type, FpuRegister reg, GpuRegister base, in StoreFpuToOffset() function in art::mips64::Mips64Assembler
/art/compiler/optimizing/
Dcode_generator_mips64.cc754 __ StoreFpuToOffset(store_type, in MoveLocation() local
837 __ StoreFpuToOffset(store_type, in SwapLocations() local
940 __ StoreFpuToOffset(kStoreDoubleword, FpuRegister(reg_id), SP, stack_index); in SaveFloatingPointRegister() local
1551 __ StoreFpuToOffset(kStoreWord, value, obj, offset); in VisitArraySet() local
1555 __ StoreFpuToOffset(kStoreWord, value, TMP, data_offset); in VisitArraySet() local
1567 __ StoreFpuToOffset(kStoreDoubleword, value, obj, offset); in VisitArraySet() local
1571 __ StoreFpuToOffset(kStoreDoubleword, value, TMP, data_offset); in VisitArraySet() local
2820 __ StoreFpuToOffset(store_type, src, obj, field_info.GetFieldOffset().Uint32Value()); in HandleFieldSet() local