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Searched defs:SubReg0 (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64AdvSIMDScalarPass.cpp214 unsigned Src0 = 0, SubReg0; in isProfitableToTransform() local
307 unsigned Src0 = 0, SubReg0; in transformInstruction() local
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1596 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::gsub_0, dl, MVT::i32); in createGPRPairNode() local
1607 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, dl, MVT::i32); in createSRegPairNode() local
1618 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, dl, MVT::i32); in createDRegPairNode() local
1629 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::qsub_0, dl, MVT::i32); in createQRegPairNode() local
1641 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, dl, MVT::i32); in createQuadSRegsNode() local
1656 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, dl, MVT::i32); in createQuadDRegsNode() local
1671 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::qsub_0, dl, MVT::i32); in createQuadQRegsNode() local
/external/llvm/lib/CodeGen/
DTargetInstrInfo.cpp142 unsigned SubReg0 = HasDef ? MI->getOperand(0).getSubReg() : 0; in commuteInstructionImpl() local
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp407 SDValue RC, SubReg0, SubReg1; in Select() local