| /art/compiler/optimizing/ |
| D | dex_cache_array_fixups_arm.cc | 41 HArmDexCacheArraysBase* base = entry.second; in MoveBasesIfNeeded() local
53 HArmDexCacheArraysBase* base = GetOrCreateDexCacheArrayBase(dex_file); in VisitLoadString() local
68 HArmDexCacheArraysBase* base = GetOrCreateDexCacheArrayBase(*target_method.dex_file); in VisitInvokeStaticOrDirect() local
88 HArmDexCacheArraysBase* base = new (GetGraph()->GetArena()) HArmDexCacheArraysBase(dex_file); in GetOrCreateDexCacheArrayBase() local
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| /art/test/564-checker-negbitwise/src/ |
| D | Main.java | 79 public static int $opt$noinline$notAnd(int base, int mask) { in $opt$noinline$notAnd()
129 public static long $opt$noinline$notOr(long base, long mask) { in $opt$noinline$notOr()
176 public static int $opt$noinline$notXor(int base, int mask) { in $opt$noinline$notXor()
268 public static int $opt$noinline$notAndMultipleUses(int base, int mask) { in $opt$noinline$notAndMultipleUses()
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| /art/runtime/ |
| D | image-inl.h | 50 uint8_t* base, in VisitPackedImTables()
68 uint8_t* base, in VisitPackedImtConflictTables()
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| D | monitor_pool.h | 141 uintptr_t base = monitor_chunks_[top_index][list_index]; in LookupMonitor() local
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| D | image.cc | 162 uint8_t* base, in VisitPackedArtMethods()
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| D | oat_file.h | 134 OatMethod(const uint8_t* base, const uint32_t code_offset) in OatMethod()
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 98 XRegister base, int32_t offset) { in StoreWToOffset()
114 void Arm64Assembler::StoreToOffset(XRegister source, XRegister base, int32_t offset) { in StoreToOffset()
119 void Arm64Assembler::StoreSToOffset(SRegister source, XRegister base, int32_t offset) { in StoreSToOffset()
123 void Arm64Assembler::StoreDToOffset(DRegister source, XRegister base, int32_t offset) { in StoreDToOffset()
221 XRegister base, int32_t offset) { in LoadWFromOffset()
245 void Arm64Assembler::LoadFromOffset(XRegister dest, XRegister base, in LoadFromOffset()
251 void Arm64Assembler::LoadSFromOffset(SRegister dest, XRegister base, in LoadSFromOffset()
256 void Arm64Assembler::LoadDFromOffset(DRegister dest, XRegister base, in LoadDFromOffset()
261 void Arm64Assembler::Load(Arm64ManagedRegister dest, XRegister base, in Load()
301 Arm64ManagedRegister base = m_base.AsArm64(); in LoadRef() local
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| /art/test/065-mismatched-implements/src/ |
| D | Indirect.java | 25 Base base = new Base(); in main() local
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| /art/test/066-mismatched-super/src/ |
| D | Indirect.java | 25 Base base = new Base(); in main() local
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| /art/test/106-exceptions2/src/ |
| D | Main.java | 134 Main base = new Main(); in nullCheckTestNoThrow() local
143 Main base = new Main(); in nullCheckTestThrow() local
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| /art/compiler/utils/ |
| D | assembler_test.h | 157 std::string base = fmt; in RepeatTemplatedRegistersImmBits() local
209 std::string base = fmt; in RepeatTemplatedImmBitsRegisters() local
256 std::string base = fmt; in RepeatTemplatedRegisterImmBits() local
403 std::string base = fmt; variable
630 std::string base = fmt; in RepeatTemplatedRegister() local
661 std::string base = fmt; in RepeatTemplatedRegisters() local
700 std::string base = fmt; in RepeatTemplatedRegistersNoDupes() local
739 std::string base = fmt; in RepeatTemplatedRegisters() local
788 std::string base = fmt; in RepeatTemplatedRegistersImm() local
882 std::string base = fmt; in RepeatRegisterImm() local
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| /art/test/970-iface-super-resolution-generated/util-src/ |
| D | generate_java.py | 21 import generate_smali as base namespace
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| /art/test/449-checker-bce/src/ |
| D | Main.java | 350 static void constantIndexing7(int[] array, int base) { in constantIndexing7()
380 static void constantIndexing8(int[] array, int base) { in constantIndexing8()
411 static void constantIndexing9(int[] array, int base) { in constantIndexing9()
444 static void constantIndexing10(int[] array, int base) { in constantIndexing10()
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| /art/test/971-iface-super/util-src/ |
| D | generate_java.py | 21 import generate_smali as base namespace
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| /art/test/968-default-partial-compile-generated/util-src/ |
| D | generate_java.py | 21 import generate_smali as base namespace
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| /art/runtime/gc/space/ |
| D | dlmalloc_space.h | 152 void* CreateAllocator(void* base, size_t morecore_start, size_t initial_size, in CreateAllocator()
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| D | rosalloc_space.h | 160 void* CreateAllocator(void* base, size_t morecore_start, size_t initial_size, in CreateAllocator()
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| /art/test/072-precise-gc/src/ |
| D | Main.java | 61 static String generateString(String base, int num) { in generateString()
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| /art/compiler/ |
| D | cfi_test.h | 63 const uint8_t* base = actual_asm.data() + (isa == kThumb2 ? 1 : 0); in GenerateExpected() local
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| /art/test/003-omnibus-opcodes/src/ |
| D | MethodCall.java | 56 MethodCallBase base = inst; in run() local
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| /art/compiler/utils/arm/ |
| D | assembler_arm.cc | 537 void ArmAssembler::LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs, in LoadRef()
554 void ArmAssembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base, in LoadRawPtr()
810 ArmManagedRegister base = mbase.AsArm(); in Call() local
820 void ArmAssembler::Call(FrameOffset base, Offset offset, in Call()
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| D | assembler_arm32.cc | 323 Register base, in ldm()
331 Register base, in stm()
660 Register base, in EmitMultiMemOp()
1469 Register base, in LoadFromOffset()
1509 Register base, in LoadSFromOffset()
1527 Register base, in LoadDFromOffset()
1546 Register base, in StoreToOffset()
1581 Register base, in StoreSToOffset()
1599 Register base, in StoreDToOffset()
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| /art/runtime/arch/x86/ |
| D | thread_x86.cc | 47 const uintptr_t base = reinterpret_cast<uintptr_t>(this); in InitCpu() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 488 void MipsAssembler::LlR2(Register rt, Register base, int16_t imm16) { in LlR2()
493 void MipsAssembler::ScR2(Register rt, Register base, int16_t imm16) { in ScR2()
498 void MipsAssembler::LlR6(Register rt, Register base, int16_t imm9) { in LlR6()
504 void MipsAssembler::ScR6(Register rt, Register base, int16_t imm9) { in ScR6()
1385 Register base, in StoreConst32ToOffset()
1404 Register base, in StoreConst64ToOffset()
2265 void MipsAssembler::LoadFromOffset(LoadOperandType type, Register reg, Register base, in LoadFromOffset()
2308 void MipsAssembler::LoadSFromOffset(FRegister reg, Register base, int32_t offset) { in LoadSFromOffset()
2319 void MipsAssembler::LoadDFromOffset(FRegister reg, Register base, int32_t offset) { in LoadDFromOffset()
2366 void MipsAssembler::StoreToOffset(StoreOperandType type, Register reg, Register base, in StoreToOffset()
[all …]
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 320 void Mips64Assembler::Sc(GpuRegister rt, GpuRegister base, int16_t imm9) { in Sc()
325 void Mips64Assembler::Scd(GpuRegister rt, GpuRegister base, int16_t imm9) { in Scd()
330 void Mips64Assembler::Ll(GpuRegister rt, GpuRegister base, int16_t imm9) { in Ll()
335 void Mips64Assembler::Lld(GpuRegister rt, GpuRegister base, int16_t imm9) { in Lld()
1803 void Mips64Assembler::LoadFromOffset(LoadOperandType type, GpuRegister reg, GpuRegister base, in LoadFromOffset()
1848 void Mips64Assembler::LoadFpuFromOffset(LoadOperandType type, FpuRegister reg, GpuRegister base, in LoadFpuFromOffset()
1906 void Mips64Assembler::StoreToOffset(StoreOperandType type, GpuRegister reg, GpuRegister base, in StoreToOffset()
1943 void Mips64Assembler::StoreFpuToOffset(StoreOperandType type, FpuRegister reg, GpuRegister base, in StoreFpuToOffset()
2150 void Mips64Assembler::LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs, in LoadRef()
2165 void Mips64Assembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base, in LoadRawPtr()
[all …]
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