| /art/runtime/ |
| D | dex_instruction_utils.h | 54 constexpr bool IsInstructionDirectConst(Instruction::Code opcode) { in IsInstructionDirectConst()
58 constexpr bool IsInstructionConstWide(Instruction::Code opcode) { in IsInstructionConstWide()
62 constexpr bool IsInstructionReturn(Instruction::Code opcode) { in IsInstructionReturn()
66 constexpr bool IsInstructionInvoke(Instruction::Code opcode) { in IsInstructionInvoke()
71 constexpr bool IsInstructionQuickInvoke(Instruction::Code opcode) { in IsInstructionQuickInvoke()
76 constexpr bool IsInstructionInvokeStatic(Instruction::Code opcode) { in IsInstructionInvokeStatic()
80 constexpr bool IsInstructionGoto(Instruction::Code opcode) { in IsInstructionGoto()
84 constexpr bool IsInstructionIfCc(Instruction::Code opcode) { in IsInstructionIfCc()
88 constexpr bool IsInstructionIfCcZ(Instruction::Code opcode) { in IsInstructionIfCcZ()
139 constexpr bool IsInvokeInstructionRange(Instruction::Code opcode) { in IsInvokeInstructionRange()
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| D | dex_instruction.h | 83 #define INSTRUCTION_ENUM(opcode, cname, p, f, r, i, a, v) cname = opcode, argument
246 static const char* Name(Code opcode) { in Name()
428 void SetOpcode(Code opcode) { in SetOpcode()
459 static Format FormatOf(Code opcode) { in FormatOf()
464 static IndexType IndexTypeOf(Code opcode) { in IndexTypeOf()
469 static int FlagsOf(Code opcode) { in FlagsOf()
474 static int VerifyFlagsOf(Code opcode) { in VerifyFlagsOf()
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| D | dex_instruction.cc | 71 #define INSTRUCTION_SIZE(opcode, c, p, format, r, i, a, v) \ argument
101 Code opcode = static_cast<Code>(insn & 0xFF); in CanFlowThrough() local
164 const char* opcode = kInstructionNames[Opcode()]; in DumpString() local
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| /art/tools/dexfuzz/src/dexfuzz/rawdex/ |
| D | OpcodeInfo.java | 27 public final Opcode opcode; field in OpcodeInfo
35 public OpcodeInfo(Opcode opcode, String name, int opcodeValue, AbstractFormat fmt) { in OpcodeInfo()
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| D | CodeItem.java | 149 Opcode opcode = insn.info.opcode; in incrementIndex() local
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| D | Opcode.java | 277 public static boolean isBetween(Opcode opcode, Opcode opcode1, Opcode opcode2) { in isBetween()
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| /art/tools/dexfuzz/src/dexfuzz/program/mutators/ |
| D | CmpBiasChanger.java | 134 Opcode opcode = mInsn.insn.info.opcode; in getLegalDifferentOpcode() local
148 Opcode opcode = mInsn.insn.info.opcode; in isCmpBiasOperation() local
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| D | ArithOpChanger.java | 151 Opcode opcode = mInsn.insn.info.opcode; in isArithmeticOperation() local
159 Opcode opcode = mInsn.insn.info.opcode; in getLegalDifferentOpcode() local
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| D | InstructionDuplicator.java | 74 Opcode opcode = oldInsn.insn.info.opcode; in generateMutation() local
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| D | ConversionRepeater.java | 194 Opcode opcode = mInsn.insn.info.opcode; in isConversionInstruction() local
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| D | FieldFlagChanger.java | 156 Opcode opcode = mInsn.insn.info.opcode; in isFileDefinedFieldInstruction() local
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| D | ValuePrinter.java | 216 Opcode opcode = mInsn.insn.info.opcode; in getInstructionOutputType() local
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| /art/runtime/quick/ |
| D | inline_method_analyser.h | 199 InlineMethodOpcode opcode; member
224 static constexpr bool IsInstructionIGet(Instruction::Code opcode) { in IsInstructionIGet()
228 static constexpr bool IsInstructionIPut(Instruction::Code opcode) { in IsInstructionIPut()
232 static constexpr uint16_t IGetVariant(Instruction::Code opcode) { in IGetVariant()
236 static constexpr uint16_t IPutVariant(Instruction::Code opcode) { in IPutVariant()
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| D | inline_method_analyser.cc | 468 Instruction::Code opcode = instruction->Opcode(); in AnalyseMethodCode() local
599 Instruction::Code opcode = instruction->Opcode(); in AnalyseIGetMethod() local
664 Instruction::Code opcode = instruction->Opcode(); in AnalyseIPutMethod() local
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| /art/tools/dexfuzz/src/dexfuzz/program/ |
| D | CodeTranslator.java | 570 Opcode opcode = insn.info.opcode; in isInstructionBranch() local
582 Opcode opcode = insn.info.opcode; in isInstructionSwitch() local
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| /art/disassembler/ |
| D | disassembler_mips.cc | 419 std::string opcode; in Dump() local
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| D | disassembler_arm.cc | 252 std::string opcode; in DumpArm() local
503 std::ostringstream opcode; in DumpThumb32() local
1603 std::ostringstream opcode; in DumpThumb16() local
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| /art/compiler/debug/dwarf/ |
| D | debug_line_opcode_writer.h | 180 int opcode = kOpcodeBase + (delta_line - kLineBase) + in AddRow() local
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| /art/compiler/utils/arm/ |
| D | assembler_thumb2.cc | 515 Opcode opcode, in ShifterOperandCanHold()
1176 Opcode opcode, in Is32BitDataProcessing()
1339 Opcode opcode, in Emit32BitDataProcessing()
1426 Opcode opcode, in Emit16BitDataProcessing()
1617 Opcode opcode, in Emit16BitAddSub()
1777 Opcode opcode, in EmitDataProcessing()
1801 uint16_t opcode = 0; in EmitShift() local
1822 uint16_t opcode = 0; in EmitShift() local
1851 uint16_t opcode = 0; in EmitShift() local
1868 uint16_t opcode = 0; in EmitShift() local
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| D | assembler_arm32.cc | 575 Opcode opcode, in EmitType01()
675 Shift opcode, in EmitShiftImmediate()
692 Shift opcode, in EmitShiftRegister()
811 void Arm32Assembler::EmitMulOp(Condition cond, int32_t opcode, in EmitMulOp()
1135 void Arm32Assembler::EmitVFPsss(Condition cond, int32_t opcode, in EmitVFPsss()
1153 void Arm32Assembler::EmitVFPddd(Condition cond, int32_t opcode, in EmitVFPddd()
1171 void Arm32Assembler::EmitVFPsd(Condition cond, int32_t opcode, in EmitVFPsd()
1186 void Arm32Assembler::EmitVFPds(Condition cond, int32_t opcode, in EmitVFPds()
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| D | assembler_arm.h | 892 Opcode opcode, in ShifterOperandCanHold()
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| /art/runtime/arch/x86/ |
| D | fault_handler_x86.cc | 102 uint8_t opcode = *pc++; in GetInstructionSize() local
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 91 void Mips64Assembler::EmitR(int opcode, GpuRegister rs, GpuRegister rt, GpuRegister rd, in EmitR()
105 void Mips64Assembler::EmitRsd(int opcode, GpuRegister rs, GpuRegister rd, in EmitRsd()
118 void Mips64Assembler::EmitRtd(int opcode, GpuRegister rt, GpuRegister rd, in EmitRtd()
131 void Mips64Assembler::EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm) { in EmitI()
141 void Mips64Assembler::EmitI21(int opcode, GpuRegister rs, uint32_t imm21) { in EmitI21()
150 void Mips64Assembler::EmitI26(int opcode, uint32_t imm26) { in EmitI26()
156 void Mips64Assembler::EmitFR(int opcode, int fmt, FpuRegister ft, FpuRegister fs, FpuRegister fd, in EmitFR()
170 void Mips64Assembler::EmitFI(int opcode, int fmt, FpuRegister ft, uint16_t imm) { in EmitFI()
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| /art/runtime/interpreter/ |
| D | interpreter_goto_table_impl.cc | 93 #define HANDLE_INSTRUCTION_START(opcode) op_##opcode: // NOLINT(whitespace/labels) argument
97 #define HANDLE_EXPERIMENTAL_INSTRUCTION_START(opcode) \ argument
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 125 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) { in EmitR()
138 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) { in EmitI()
148 void MipsAssembler::EmitI21(int opcode, Register rs, uint32_t imm21) { in EmitI21()
157 void MipsAssembler::EmitI26(int opcode, uint32_t imm26) { in EmitI26()
163 void MipsAssembler::EmitFR(int opcode, int fmt, FRegister ft, FRegister fs, FRegister fd, in EmitFR()
177 void MipsAssembler::EmitFI(int opcode, int fmt, FRegister ft, uint16_t imm) { in EmitFI()
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