1 /************************************************************************** 2 3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 4 VA Linux Systems Inc., Fremont, California. 5 6 All Rights Reserved. 7 8 Permission is hereby granted, free of charge, to any person obtaining 9 a copy of this software and associated documentation files (the 10 "Software"), to deal in the Software without restriction, including 11 without limitation the rights to use, copy, modify, merge, publish, 12 distribute, sublicense, and/or sell copies of the Software, and to 13 permit persons to whom the Software is furnished to do so, subject to 14 the following conditions: 15 16 The above copyright notice and this permission notice (including the 17 next paragraph) shall be included in all copies or substantial 18 portions of the Software. 19 20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27 28 **************************************************************************/ 29 30 /* 31 * Authors: 32 * Kevin E. Martin <martin@valinux.com> 33 * Gareth Hughes <gareth@valinux.com> 34 */ 35 36 #ifndef __RADEON_SCREEN_H__ 37 #define __RADEON_SCREEN_H__ 38 39 /* 40 * IMPORTS: these headers contain all the DRI, X and kernel-related 41 * definitions that we need. 42 */ 43 #include "dri_util.h" 44 #include "radeon_dri.h" 45 #include "radeon_chipset.h" 46 #include "radeon_reg.h" 47 #include "drm_sarea.h" 48 #include "xmlconfig.h" 49 50 51 typedef struct { 52 drm_handle_t handle; /* Handle to the DRM region */ 53 drmSize size; /* Size of the DRM region */ 54 drmAddress map; /* Mapping of the DRM region */ 55 } radeonRegionRec, *radeonRegionPtr; 56 57 typedef struct radeon_screen { 58 int chip_family; 59 int chip_flags; 60 int cpp; 61 int card_type; 62 int device_id; /* PCI ID */ 63 int AGPMode; 64 unsigned int irq; /* IRQ number (0 means none) */ 65 66 unsigned int fbLocation; 67 unsigned int frontOffset; 68 unsigned int frontPitch; 69 unsigned int backOffset; 70 unsigned int backPitch; 71 72 unsigned int depthOffset; 73 unsigned int depthPitch; 74 75 /* Shared texture data */ 76 int numTexHeaps; 77 int texOffset[RADEON_NR_TEX_HEAPS]; 78 int texSize[RADEON_NR_TEX_HEAPS]; 79 int logTexGranularity[RADEON_NR_TEX_HEAPS]; 80 81 radeonRegionRec mmio; 82 radeonRegionRec status; 83 radeonRegionRec gartTextures; 84 85 drmBufMapPtr buffers; 86 87 __volatile__ uint32_t *scratch; 88 89 __DRIscreen *driScreen; 90 unsigned int sarea_priv_offset; 91 unsigned int gart_buffer_offset; /* offset in card memory space */ 92 unsigned int gart_texture_offset; /* offset in card memory space */ 93 unsigned int gart_base; 94 95 GLboolean depthHasSurface; 96 97 /* Configuration cache with default values for all contexts */ 98 driOptionCache optionCache; 99 100 const __DRIextension *extensions[17]; 101 102 int num_gb_pipes; 103 int num_z_pipes; 104 drm_radeon_sarea_t *sarea; /* Private SAREA data */ 105 struct radeon_bo_manager *bom; 106 107 } radeonScreenRec, *radeonScreenPtr; 108 109 struct __DRIimageRec { 110 struct radeon_bo *bo; 111 GLenum internal_format; 112 uint32_t dri_format; 113 GLuint format; 114 GLenum data_type; 115 int width, height; /* in pixels */ 116 int pitch; /* in pixels */ 117 int cpp; 118 void *data; 119 }; 120 121 extern void radeonDestroyBuffer(__DRIdrawable *driDrawPriv); 122 #endif /* __RADEON_SCREEN_H__ */ 123