1 /*===---- tmmintrin.h - SSSE3 intrinsics -----------------------------------===
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 * THE SOFTWARE.
20 *
21 *===-----------------------------------------------------------------------===
22 */
23
24 #ifndef __TMMINTRIN_H
25 #define __TMMINTRIN_H
26
27 #include <pmmintrin.h>
28
29 /* Define the default attributes for the functions in this file. */
30 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("ssse3")))
31
32 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_abs_pi8(__m64 __a)33 _mm_abs_pi8(__m64 __a)
34 {
35 return (__m64)__builtin_ia32_pabsb((__v8qi)__a);
36 }
37
38 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_abs_epi8(__m128i __a)39 _mm_abs_epi8(__m128i __a)
40 {
41 return (__m128i)__builtin_ia32_pabsb128((__v16qi)__a);
42 }
43
44 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_abs_pi16(__m64 __a)45 _mm_abs_pi16(__m64 __a)
46 {
47 return (__m64)__builtin_ia32_pabsw((__v4hi)__a);
48 }
49
50 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_abs_epi16(__m128i __a)51 _mm_abs_epi16(__m128i __a)
52 {
53 return (__m128i)__builtin_ia32_pabsw128((__v8hi)__a);
54 }
55
56 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_abs_pi32(__m64 __a)57 _mm_abs_pi32(__m64 __a)
58 {
59 return (__m64)__builtin_ia32_pabsd((__v2si)__a);
60 }
61
62 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_abs_epi32(__m128i __a)63 _mm_abs_epi32(__m128i __a)
64 {
65 return (__m128i)__builtin_ia32_pabsd128((__v4si)__a);
66 }
67
68 #define _mm_alignr_epi8(a, b, n) __extension__ ({ \
69 (__m128i)__builtin_ia32_palignr128((__v16qi)(__m128i)(a), \
70 (__v16qi)(__m128i)(b), (n)); })
71
72 #define _mm_alignr_pi8(a, b, n) __extension__ ({ \
73 (__m64)__builtin_ia32_palignr((__v8qi)(__m64)(a), (__v8qi)(__m64)(b), (n)); })
74
75 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hadd_epi16(__m128i __a,__m128i __b)76 _mm_hadd_epi16(__m128i __a, __m128i __b)
77 {
78 return (__m128i)__builtin_ia32_phaddw128((__v8hi)__a, (__v8hi)__b);
79 }
80
81 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hadd_epi32(__m128i __a,__m128i __b)82 _mm_hadd_epi32(__m128i __a, __m128i __b)
83 {
84 return (__m128i)__builtin_ia32_phaddd128((__v4si)__a, (__v4si)__b);
85 }
86
87 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hadd_pi16(__m64 __a,__m64 __b)88 _mm_hadd_pi16(__m64 __a, __m64 __b)
89 {
90 return (__m64)__builtin_ia32_phaddw((__v4hi)__a, (__v4hi)__b);
91 }
92
93 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hadd_pi32(__m64 __a,__m64 __b)94 _mm_hadd_pi32(__m64 __a, __m64 __b)
95 {
96 return (__m64)__builtin_ia32_phaddd((__v2si)__a, (__v2si)__b);
97 }
98
99 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hadds_epi16(__m128i __a,__m128i __b)100 _mm_hadds_epi16(__m128i __a, __m128i __b)
101 {
102 return (__m128i)__builtin_ia32_phaddsw128((__v8hi)__a, (__v8hi)__b);
103 }
104
105 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hadds_pi16(__m64 __a,__m64 __b)106 _mm_hadds_pi16(__m64 __a, __m64 __b)
107 {
108 return (__m64)__builtin_ia32_phaddsw((__v4hi)__a, (__v4hi)__b);
109 }
110
111 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hsub_epi16(__m128i __a,__m128i __b)112 _mm_hsub_epi16(__m128i __a, __m128i __b)
113 {
114 return (__m128i)__builtin_ia32_phsubw128((__v8hi)__a, (__v8hi)__b);
115 }
116
117 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hsub_epi32(__m128i __a,__m128i __b)118 _mm_hsub_epi32(__m128i __a, __m128i __b)
119 {
120 return (__m128i)__builtin_ia32_phsubd128((__v4si)__a, (__v4si)__b);
121 }
122
123 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hsub_pi16(__m64 __a,__m64 __b)124 _mm_hsub_pi16(__m64 __a, __m64 __b)
125 {
126 return (__m64)__builtin_ia32_phsubw((__v4hi)__a, (__v4hi)__b);
127 }
128
129 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hsub_pi32(__m64 __a,__m64 __b)130 _mm_hsub_pi32(__m64 __a, __m64 __b)
131 {
132 return (__m64)__builtin_ia32_phsubd((__v2si)__a, (__v2si)__b);
133 }
134
135 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_hsubs_epi16(__m128i __a,__m128i __b)136 _mm_hsubs_epi16(__m128i __a, __m128i __b)
137 {
138 return (__m128i)__builtin_ia32_phsubsw128((__v8hi)__a, (__v8hi)__b);
139 }
140
141 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_hsubs_pi16(__m64 __a,__m64 __b)142 _mm_hsubs_pi16(__m64 __a, __m64 __b)
143 {
144 return (__m64)__builtin_ia32_phsubsw((__v4hi)__a, (__v4hi)__b);
145 }
146
147 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_maddubs_epi16(__m128i __a,__m128i __b)148 _mm_maddubs_epi16(__m128i __a, __m128i __b)
149 {
150 return (__m128i)__builtin_ia32_pmaddubsw128((__v16qi)__a, (__v16qi)__b);
151 }
152
153 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_maddubs_pi16(__m64 __a,__m64 __b)154 _mm_maddubs_pi16(__m64 __a, __m64 __b)
155 {
156 return (__m64)__builtin_ia32_pmaddubsw((__v8qi)__a, (__v8qi)__b);
157 }
158
159 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mulhrs_epi16(__m128i __a,__m128i __b)160 _mm_mulhrs_epi16(__m128i __a, __m128i __b)
161 {
162 return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b);
163 }
164
165 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_mulhrs_pi16(__m64 __a,__m64 __b)166 _mm_mulhrs_pi16(__m64 __a, __m64 __b)
167 {
168 return (__m64)__builtin_ia32_pmulhrsw((__v4hi)__a, (__v4hi)__b);
169 }
170
171 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_shuffle_epi8(__m128i __a,__m128i __b)172 _mm_shuffle_epi8(__m128i __a, __m128i __b)
173 {
174 return (__m128i)__builtin_ia32_pshufb128((__v16qi)__a, (__v16qi)__b);
175 }
176
177 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_shuffle_pi8(__m64 __a,__m64 __b)178 _mm_shuffle_pi8(__m64 __a, __m64 __b)
179 {
180 return (__m64)__builtin_ia32_pshufb((__v8qi)__a, (__v8qi)__b);
181 }
182
183 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sign_epi8(__m128i __a,__m128i __b)184 _mm_sign_epi8(__m128i __a, __m128i __b)
185 {
186 return (__m128i)__builtin_ia32_psignb128((__v16qi)__a, (__v16qi)__b);
187 }
188
189 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sign_epi16(__m128i __a,__m128i __b)190 _mm_sign_epi16(__m128i __a, __m128i __b)
191 {
192 return (__m128i)__builtin_ia32_psignw128((__v8hi)__a, (__v8hi)__b);
193 }
194
195 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sign_epi32(__m128i __a,__m128i __b)196 _mm_sign_epi32(__m128i __a, __m128i __b)
197 {
198 return (__m128i)__builtin_ia32_psignd128((__v4si)__a, (__v4si)__b);
199 }
200
201 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_sign_pi8(__m64 __a,__m64 __b)202 _mm_sign_pi8(__m64 __a, __m64 __b)
203 {
204 return (__m64)__builtin_ia32_psignb((__v8qi)__a, (__v8qi)__b);
205 }
206
207 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_sign_pi16(__m64 __a,__m64 __b)208 _mm_sign_pi16(__m64 __a, __m64 __b)
209 {
210 return (__m64)__builtin_ia32_psignw((__v4hi)__a, (__v4hi)__b);
211 }
212
213 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_sign_pi32(__m64 __a,__m64 __b)214 _mm_sign_pi32(__m64 __a, __m64 __b)
215 {
216 return (__m64)__builtin_ia32_psignd((__v2si)__a, (__v2si)__b);
217 }
218
219 #undef __DEFAULT_FN_ATTRS
220
221 #endif /* __TMMINTRIN_H */
222