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Searched refs:ADDiu (Results 1 – 15 of 15) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsAnalyzeImmediate.cpp32 AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL)); in GetInstSeqLsADDiu()
58 AddInstr(SeqLs, Inst(ADDiu, MaskedImm)); in GetInstSeqLs()
89 if ((Seq.size() < 2) || (Seq[0].Opc != ADDiu) || in ReplaceADDiuSLLWithLUi()
131 ADDiu = Mips::ADDiu; in Analyze()
136 ADDiu = Mips::DADDiu; in Analyze()
DMipsAnalyzeImmediate.h58 unsigned ADDiu, ORi, SLL, LUi; variable
DMipsInstrInfo.td118 // target constant nodes that would otherwise remain unchanged with ADDiu
1332 def ADDiu : MMRel, StdMMR6Rel, ArithLogicI<"addiu", simm16, GPR32Opnd,
1827 (ADDiu GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm), 0>;
1829 (ADDiu GPR32Opnd:$rs, GPR32Opnd:$rs, simm16:$imm), 0>;
1914 (ADDiu GPR32Opnd:$rd, GPR32Opnd:$rs,
1916 def : MipsInstAlias<"subu $rs, $imm", (ADDiu GPR32Opnd:$rs, GPR32Opnd:$rs,
2046 (ADDiu ZERO, imm:$in)>;
2064 (ADDiu GPR32:$src, imm:$imm)>;
2098 def : MipsPat<(MipsLo tglobaladdr:$in), (ADDiu ZERO, tglobaladdr:$in)>;
2099 def : MipsPat<(MipsLo tblockaddress:$in), (ADDiu ZERO, tblockaddress:$in)>;
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DMipsLongBranch.cpp295 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
335 .append(BuildMI(*MF, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
339 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
445 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0) in emitGPDisp()
DMipsSEISelDAGToDAG.cpp91 if ((MI.getOpcode() == Mips::ADDiu) && in replaceUsesWithZeroReg()
172 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0) in initGlobalBaseReg()
188 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V1) in initGlobalBaseReg()
DMipsMCInstLower.cpp209 lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu, in lowerLongBranch()
DMipsFastISel.cpp308 unsigned Opc = Mips::ADDiu; in materialize32BitInt()
367 emitInst(Mips::ADDiu, TempReg) in materializeGV()
690 emitInst(Mips::ADDiu, RegWithZero).addReg(Mips::ZERO).addImm(0); in emitCmp()
691 emitInst(Mips::ADDiu, RegWithOne).addReg(Mips::ZERO).addImm(1); in emitCmp()
DMipsSEInstrInfo.cpp433 unsigned ADDiu = ABI.GetPtrAddiuOp(); in adjustStackPtr() local
439 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount); in adjustStackPtr()
DMipsSEFrameLowering.cpp394 unsigned ADDiu = ABI.GetPtrAddiuOp(); in emitPrologue() local
523 BuildMI(MBB, MBBI, dl, TII.get(ADDiu), VR).addReg(ZERO) .addImm(MaxAlign); in emitPrologue()
DMipsSEISelLowering.cpp2955 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::ADDiu), VR2) in emitBPOSGE32()
2961 BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), VR1) in emitBPOSGE32()
3022 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::ADDiu), RD1) in emitMSACBranchPseudo()
3028 BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), RD2) in emitMSACBranchPseudo()
DMipsDSPInstrInfo.td1369 (ValTy (COPY_TO_REGCLASS (ADDiu ZERO, -1), DSPR)),
1377 (ValTy (COPY_TO_REGCLASS (ADDiu ZERO, -1), DSPR))))>;
DMipsISelLowering.cpp1238 BuildMI(BB, DL, TII->get(Mips::ADDiu), MaskLSB2) in emitAtomicBinaryPartword()
1483 BuildMI(BB, DL, TII->get(Mips::ADDiu), MaskLSB2) in emitAtomicCmpSwapPartword()
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsABIInfo.cpp118 return ArePtrs64bit() ? Mips::DADDiu : Mips::ADDiu; in GetPtrAddiuOp()
DMipsTargetStreamer.cpp770 TmpInst.setOpcode(Mips::ADDiu); in emitDirectiveCpLoad()
848 Inst.setOpcode(Mips::ADDiu); in emitDirectiveCpsetup()
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp1674 emitRRX(Mips::ADDiu, Mips::T9, Mips::T9, in processInstruction()
2050 case Mips::ADDiu: in tryExpandInstruction()
2204 emitRRI(Mips::ADDiu, DstReg, SrcReg, ImmValue, IDLoc, Instructions); in loadImmediate()
2454 emitRRX(Mips::ADDiu, TmpReg, TmpReg, MCOperand::createExpr(LoExpr), IDLoc, in loadAndAddSymbolAddress()
3006 emitRRI(Mips::ADDiu, ATReg, ZeroReg, -1, IDLoc, Instructions); in expandDiv()
3010 emitRRI(Mips::ADDiu, ATReg, ZeroReg, 1, IDLoc, Instructions); in expandDiv()
3205 case (Mips::ADDiu): in expandAliasImmediate()