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Searched refs:ATOMIC_LOAD_ADD (Results 1 – 16 of 16) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h719 ATOMIC_LOAD_ADD, enumerator
DSelectionDAGNodes.h1199 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
1318 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp67 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; in getOperationName()
DLegalizeIntegerTypes.cpp137 case ISD::ATOMIC_LOAD_ADD: in PromoteIntegerResult()
1332 case ISD::ATOMIC_LOAD_ADD: in ExpandIntegerResult()
DSelectionDAG.cpp491 case ISD::ATOMIC_LOAD_ADD: in AddNodeIDCustom()
4890 assert((Opcode == ISD::ATOMIC_LOAD_ADD || in getAtomic()
DLegalizeDAG.cpp3986 case ISD::ATOMIC_LOAD_ADD: in ConvertNodeToLibcall()
DSelectionDAGBuilder.cpp3513 case AtomicRMWInst::Add: NT = ISD::ATOMIC_LOAD_ADD; break; in visitAtomicRMW()
/external/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp136 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
/external/llvm/lib/Target/Sparc/
DSparcInstr64Bit.td527 defm ATOMIC_LOAD_ADD : AtomicRMW<atomic_load_add_32, atomic_load_add_64>;
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp277 setTargetDAGCombine(ISD::ATOMIC_LOAD_ADD); in SITargetLowering()
2120 case ISD::ATOMIC_LOAD_ADD: in PerformDAGCombine()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp1936 case ISD::ATOMIC_LOAD_ADD: in selectAtomicLoadArith()
2313 case ISD::ATOMIC_LOAD_ADD: { in Select()
DX86ISelLowering.cpp19632 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, dl, in LowerLOAD_SUB()
20360 case ISD::ATOMIC_LOAD_ADD: in ReplaceNodeResults()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp677 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_ADD, SYNC_FETCH_AND_ADD) in getATOMIC()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp207 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Custom); in SystemZTargetLowering()
3154 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT, in lowerATOMIC_LOAD_SUB()
4363 case ISD::ATOMIC_LOAD_ADD: in LowerOperation()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td486 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp861 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in ARMTargetLowering()