Searched refs:ATOMIC_LOAD_ADD (Results 1 – 16 of 16) sorted by relevance
/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 719 ATOMIC_LOAD_ADD, enumerator
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D | SelectionDAGNodes.h | 1199 N->getOpcode() == ISD::ATOMIC_LOAD_ADD || 1318 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 67 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; in getOperationName()
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D | LegalizeIntegerTypes.cpp | 137 case ISD::ATOMIC_LOAD_ADD: in PromoteIntegerResult() 1332 case ISD::ATOMIC_LOAD_ADD: in ExpandIntegerResult()
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D | SelectionDAG.cpp | 491 case ISD::ATOMIC_LOAD_ADD: in AddNodeIDCustom() 4890 assert((Opcode == ISD::ATOMIC_LOAD_ADD || in getAtomic()
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D | LegalizeDAG.cpp | 3986 case ISD::ATOMIC_LOAD_ADD: in ConvertNodeToLibcall()
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D | SelectionDAGBuilder.cpp | 3513 case AtomicRMWInst::Add: NT = ISD::ATOMIC_LOAD_ADD; break; in visitAtomicRMW()
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/external/llvm/lib/Target/Mips/ |
D | Mips16ISelLowering.cpp | 136 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstr64Bit.td | 527 defm ATOMIC_LOAD_ADD : AtomicRMW<atomic_load_add_32, atomic_load_add_64>;
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/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 277 setTargetDAGCombine(ISD::ATOMIC_LOAD_ADD); in SITargetLowering() 2120 case ISD::ATOMIC_LOAD_ADD: in PerformDAGCombine()
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/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 1936 case ISD::ATOMIC_LOAD_ADD: in selectAtomicLoadArith() 2313 case ISD::ATOMIC_LOAD_ADD: { in Select()
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D | X86ISelLowering.cpp | 19632 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, dl, in LowerLOAD_SUB() 20360 case ISD::ATOMIC_LOAD_ADD: in ReplaceNodeResults()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 677 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_ADD, SYNC_FETCH_AND_ADD) in getATOMIC()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 207 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Custom); in SystemZTargetLowering() 3154 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT, in lowerATOMIC_LOAD_SUB() 4363 case ISD::ATOMIC_LOAD_ADD: in LowerOperation()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 486 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 861 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in ARMTargetLowering()
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