| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.h | 43 State.AllocateStack(8, 4), in f64AssignAPCS()
53 State.AllocateStack(4, 4), in f64AssignAPCS()
92 State.AllocateStack(8, 8), in f64AssignAAPCS()
254 It.convertToMem(State.AllocateStack(Size, Size)); in CC_ARM_AAPCS_Custom_Aggregate()
270 It.convertToMem(State.AllocateStack(Size, Align)); in CC_ARM_AAPCS_Custom_Aggregate()
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| /external/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 413 unsigned AllocateStack(unsigned Size, unsigned Align) { in AllocateStack() function
424 unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) { in AllocateStack() function
426 return AllocateStack(Size, Align); in AllocateStack()
431 unsigned AllocateStack(unsigned Size, unsigned Align, in AllocateStack() function
435 return AllocateStack(Size, Align); in AllocateStack()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 160 ofst = State.AllocateStack(ArgFlags.getByValSize(), in CC_Hexagon_VarArg()
176 ofst = State.AllocateStack(4, 4); in CC_Hexagon_VarArg()
181 ofst = State.AllocateStack(8, 8); in CC_Hexagon_VarArg()
187 ofst = State.AllocateStack(16, 16); in CC_Hexagon_VarArg()
193 ofst = State.AllocateStack(32, 32); in CC_Hexagon_VarArg()
199 ofst = State.AllocateStack(64, 64); in CC_Hexagon_VarArg()
205 ofst = State.AllocateStack(128, 128); in CC_Hexagon_VarArg()
211 ofst = State.AllocateStack(256, 256); in CC_Hexagon_VarArg()
224 unsigned Offset = State.AllocateStack(ArgFlags.getByValSize(), in CC_Hexagon()
258 unsigned Offset = State.AllocateStack(ArgFlags.getByValSize(), 32); in CC_Hexagon()
[all …]
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.h | 53 It.convertToMem(State.AllocateStack(Size, std::max(Align, SlotAlign))); in finishStackBlock()
|
| /external/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 57 unsigned Offset = AllocateStack(Size, Align); in HandleByVal()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 378 CCInfo.AllocateStack(MF.getDataLayout().getTypeAllocSize(Ty), in LowerCall()
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1138 CCInfo.AllocateStack(4, 4); in LowerCCCCallTo()
1146 RetCCInfo.AllocateStack(CCInfo.getNextStackOffset(), 4); in LowerCCCCallTo()
1486 CCInfo.AllocateStack(XFI->getReturnStackOffset(), 4); in LowerReturn()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 65 State.AllocateStack(8,4), in CC_Sparc_Assign_Split_64()
75 State.AllocateStack(4,4), in CC_Sparc_Assign_Split_64()
114 unsigned Offset = State.AllocateStack(size, alignment); in CC_Sparc64_Full()
153 unsigned Offset = State.AllocateStack(4, 4); in CC_Sparc64_Half()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 2449 unsigned Offset = State.AllocateStack(ValVT.getSizeInBits() >> 3, in CC_MipsO32()
2599 CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(CallConv), 1); in LowerCall()
2961 CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(CallConv), 1); in LowerFormalArguments()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1278 CCInfo.AllocateStack(LinkageSize, 8); in processCallArgs()
|
| D | PPCISelLowering.cpp | 2841 CCInfo.AllocateStack(LinkageSize, PtrByteSize); in LowerFormalArguments_32SVR4()
2925 CCByValInfo.AllocateStack(CCInfo.getNextStackOffset(), PtrByteSize); in LowerFormalArguments_32SVR4()
4541 CCInfo.AllocateStack(Subtarget.getFrameLowering()->getLinkageSize(), in LowerCall_32SVR4()
4582 CCByValInfo.AllocateStack(CCInfo.getNextStackOffset(), PtrByteSize); in LowerCall_32SVR4()
|
| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 2935 CCInfo.AllocateStack(32, 8); in fastLowerCall()
|
| D | X86ISelLowering.cpp | 2684 CCInfo.AllocateStack(32, 8); in LowerFormalArguments()
3120 CCInfo.AllocateStack(32, 8); in LowerCall()
3804 CCInfo.AllocateStack(32, 8); in IsEligibleForTailCallOptimization()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 37 unsigned Offset = State.AllocateStack(ValVT.getStoreSize(), in allocateStack()
|