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Searched refs:BitVector (Results 1 – 25 of 202) sorted by relevance

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/external/v8/test/cctest/
Dtest-bit-vector.cc37 TEST(BitVector) { in TEST() argument
40 BitVector v(15, &zone); in TEST()
47 BitVector w(15, &zone); in TEST()
55 BitVector v(64, &zone); in TEST()
60 BitVector::Iterator iter(&v); in TEST()
73 BitVector v(15, &zone); in TEST()
75 BitVector w(15, &zone); in TEST()
83 BitVector v(15, &zone); in TEST()
85 BitVector w(15, &zone); in TEST()
89 BitVector u(w, &zone); in TEST()
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/external/llvm/include/llvm/ADT/
DBitVector.h27 class BitVector {
43 friend class BitVector; variable
51 reference(BitVector &b, unsigned Idx) { in reference()
78 BitVector() : Size(0), Capacity(0) { in BitVector() function
84 explicit BitVector(unsigned s, bool t = false) : Size(s) { in Size()
93 BitVector(const BitVector &RHS) : Size(RHS.size()) { in BitVector() function
105 BitVector(BitVector &&RHS) in BitVector() function
110 ~BitVector() { in ~BitVector()
218 BitVector &set() { in set()
224 BitVector &set(unsigned Idx) { in set()
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DSmallBitVector.h94 BitVector *getPointer() const { in getPointer()
96 return reinterpret_cast<BitVector *>(X); in getPointer()
105 void switchToLarge(BitVector *BV) { in switchToLarge()
151 switchToLarge(new BitVector(s, t));
159 switchToLarge(new BitVector(*RHS.getPointer())); in SmallBitVector()
253 BitVector *BV = new BitVector(N, t);
266 BitVector *BV = new BitVector(SmallSize); in reserve()
493 switchToLarge(new BitVector(*RHS.getPointer()));
/external/v8/src/
Dbit-vector.h14 class BitVector : public ZoneObject {
19 explicit Iterator(BitVector* target) in Iterator()
53 BitVector* target_;
58 friend class BitVector; variable
65 BitVector(int length, Zone* zone) in BitVector() function
73 BitVector(const BitVector& other, Zone* zone) in BitVector() function
85 void CopyFrom(const BitVector& other) { in CopyFrom()
113 void Union(const BitVector& other) { in Union()
120 bool UnionIsChanged(const BitVector& other) { in UnionIsChanged()
131 void Intersect(const BitVector& other) { in Intersect()
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Dbit-vector.cc13 void BitVector::Print() { in Print()
28 void BitVector::Iterator::Advance() { in Advance()
43 int BitVector::Count() const { in Count()
/external/v8/src/crankshaft/
Dhydrogen-environment-liveness.h30 void ZapEnvironmentSlotsInSuccessors(HBasicBlock* block, BitVector* live);
32 void UpdateLivenessAtBlockEnd(HBasicBlock* block, BitVector* live);
33 void UpdateLivenessAtInstruction(HInstruction* instr, BitVector* live);
45 ZoneList<BitVector*> live_at_block_start_;
47 ZoneList<BitVector*> first_simulate_invalid_for_index_;
59 BitVector went_live_since_last_simulate_;
Dhydrogen-infer-representation.cc24 ZoneList<BitVector*> connected_phis(phi_count, zone()); in Run()
27 BitVector* connected_set = new(zone()) BitVector(phi_count, zone()); in Run()
57 BitVector done(phi_count, zone()); in Run()
64 for (BitVector::Iterator it(connected_phis[i]); in Run()
77 for (BitVector::Iterator it(connected_phis[i]); in Run()
86 for (BitVector::Iterator it(connected_phis[i]); in Run()
106 for (BitVector::Iterator it(connected_phis[i]); in Run()
Dhydrogen-environment-liveness.cc28 new(zone()) BitVector(maximum_environment_size_, zone()), zone()); in HEnvironmentLivenessAnalysisPhase()
31 new(zone()) BitVector(maximum_environment_size_, zone()), zone()); in HEnvironmentLivenessAnalysisPhase()
48 HBasicBlock* block, BitVector* live) { in ZapEnvironmentSlotsInSuccessors()
54 BitVector* live_in_successor = live_at_block_start_[successor_id]; in ZapEnvironmentSlotsInSuccessors()
85 BitVector* live) { in UpdateLivenessAtBlockEnd()
96 BitVector* live) { in UpdateLivenessAtInstruction()
165 BitVector live(maximum_environment_size_, zone()); in Run()
166 BitVector worklist(block_count_, zone()); in Run()
Dlithium-allocator.h21 class BitVector; variable
374 BitVector* assigned_registers() { in assigned_registers()
377 BitVector* assigned_double_registers() { in assigned_double_registers()
396 BitVector* ComputeLiveOut(HBasicBlock* block);
397 void AddInitialIntervals(HBasicBlock* block, BitVector* live_out);
398 void ProcessInstructions(HBasicBlock* block, BitVector* live);
517 ZoneList<BitVector*> live_in_sets_;
540 BitVector* assigned_registers_;
541 BitVector* assigned_double_registers_;
/external/llvm/include/llvm/CodeGen/
DRegisterScavenging.h63 BitVector RegUnitsAvailable;
67 BitVector KillRegUnits, DefRegUnits;
68 BitVector TmpRegUnits;
109 BitVector getRegsAvailable(const TargetRegisterClass *RC);
156 void setUsed(BitVector &RegUnits) { in setUsed()
159 void setUnused(BitVector &RegUnits) { in setUnused()
168 void addRegUnits(BitVector &BV, unsigned Reg);
175 BitVector &Candidates,
/external/llvm/lib/Target/Hexagon/
DHexagonGenMux.cpp63 BitVector Defs, Uses;
65 DefUseInfo(const BitVector &D, const BitVector &U) : Defs(D), Uses(U) {} in DefUseInfo()
85 void getSubRegs(unsigned Reg, BitVector &SRs) const;
86 void expandReg(unsigned Reg, BitVector &Set) const;
87 void getDefsUses(const MachineInstr *MI, BitVector &Defs,
88 BitVector &Uses) const;
104 void HexagonGenMux::getSubRegs(unsigned Reg, BitVector &SRs) const { in getSubRegs()
110 void HexagonGenMux::expandReg(unsigned Reg, BitVector &Set) const { in expandReg()
118 void HexagonGenMux::getDefsUses(const MachineInstr *MI, BitVector &Defs, in getDefsUses()
119 BitVector &Uses) const { in getDefsUses()
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/external/v8/src/compiler/
Dliveness-analyzer.h23 void ClearNonLiveFrameStateSlots(Node* frame_state, BitVector* liveness);
37 Node* ClearNonLiveStateValues(Node* frame_state, BitVector* liveness);
49 BitVector permanently_live_;
116 void Process(BitVector* result, NonLiveFrameStateSlotReplacer* relaxer);
117 bool UpdateLive(BitVector* working_area);
135 BitVector live_;
Dliveness-analyzer.cc67 BitVector working_area(static_cast<int>(local_count_), zone_); in Run()
94 void LivenessAnalyzerBlock::Process(BitVector* result, in Process()
119 bool LivenessAnalyzerBlock::UpdateLive(BitVector* working_area) { in UpdateLive()
125 Node* frame_state, BitVector* liveness) { in ClearNonLiveFrameStateSlots()
143 Node* values, BitVector* liveness) { in ClearNonLiveStateValues()
Dframe.h123 void SetAllocatedRegisters(BitVector* regs) { in SetAllocatedRegisters()
128 void SetAllocatedDoubleRegisters(BitVector* regs) { in SetAllocatedDoubleRegisters()
189 BitVector* allocated_registers_;
190 BitVector* allocated_double_registers_;
Dast-loop-assignment-analyzer.h23 BitVector* GetVariablesAssignedInLoop(IterationStatement* loop) { in GetVariablesAssignedInLoop()
37 ZoneVector<std::pair<IterationStatement*, BitVector*>> list_;
57 ZoneDeque<BitVector*> loop_stack_;
Dregister-allocator.h778 ZoneVector<BitVector*>& live_in_sets() { return live_in_sets_; } in live_in_sets()
779 ZoneVector<BitVector*>& live_out_sets() { return live_out_sets_; } in live_out_sets()
837 ZoneVector<BitVector*> live_in_sets_;
838 ZoneVector<BitVector*> live_out_sets_;
844 BitVector* assigned_registers_;
845 BitVector* assigned_double_registers_;
890 static BitVector* ComputeLiveOut(const InstructionBlock* block,
899 ZoneVector<BitVector*>& live_in_sets() const { in live_in_sets()
906 void AddInitialIntervals(const InstructionBlock* block, BitVector* live_out);
907 void ProcessInstructions(const InstructionBlock* block, BitVector* live);
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/external/llvm/lib/CodeGen/
DSpillPlacement.h37 class BitVector; variable
53 BitVector *ActiveNodes;
104 void prepare(BitVector &RegBundles);
DRegisterScavenging.cpp61 BitVector PR = MF.getFrameInfo()->getPristineRegs(MF); in initRegState()
95 void RegScavenger::addRegUnits(BitVector &BV, unsigned Reg) { in addRegUnits()
276 BitVector RegScavenger::getRegsAvailable(const TargetRegisterClass *RC) { in getRegsAvailable()
277 BitVector Mask(TRI->getNumRegs()); in getRegsAvailable()
292 BitVector &Candidates, in findSurvivorReg()
370 BitVector Candidates = in scavengeRegister()
383 BitVector Available = getRegsAvailable(RC); in scavengeRegister()
DCriticalAntiDepBreaker.h44 const BitVector AllocatableSet;
68 BitVector KeepRegs;
/external/llvm/lib/Target/AMDGPU/
DAMDGPURegisterInfo.h36 BitVector getReservedRegs(const MachineFunction &MF) const override { in getReservedRegs()
37 assert(!"Unimplemented"); return BitVector(); in getReservedRegs()
/external/clang/include/clang/Analysis/Analyses/
DReachableCode.h24 class BitVector; variable
62 llvm::BitVector &Reachable);
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPURegisterInfo.h38 virtual BitVector getReservedRegs(const MachineFunction &MF) const { in getReservedRegs()
39 assert(!"Unimplemented"); return BitVector(); in getReservedRegs()
DSIRegisterInfo.cpp27 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const in getReservedRegs()
29 BitVector Reserved(getNumRegs()); in getReservedRegs()
DAMDILDevice.h105 llvm::BitVector mHWBits;
106 llvm::BitVector mSWBits;
/external/llvm/unittests/ADT/
DSCCIteratorTest.cpp34 typedef unsigned char BitVector; // Where the limitation N <= 8 comes from. typedef in llvm::Graph::NodeSubset
35 BitVector Elements;
36 NodeSubset(BitVector e) : Elements(e) {} in NodeSubset()
40 assert(N <= sizeof(BitVector)*CHAR_BIT && "Graph too big!"); in NodeSubset()

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