Searched refs:CopyFromReg (Results 1 – 21 of 21) sorted by relevance
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ResourcePriorityQueue.cpp | 88 case ISD::CopyFromReg: NumberDeps++; break; in numberRCValPredInSU()
125 case ISD::CopyFromReg: break; in numberRCValSuccInSU()
456 case ISD::CopyFromReg: in SUSchedulingCost()
562 case ISD::CopyFromReg: in initNumRegDefsLeft()
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| D | StatepointLowering.cpp | 344 while (CallEnd->getOpcode() == ISD::CopyFromReg) in lowerCallFromStatepoint()
849 SDValue CopyFromReg = getCopyFromRegs(I, RetTy); in visitGCResult() local
851 assert(CopyFromReg.getNode()); in visitGCResult()
852 setValue(&CI, CopyFromReg); in visitGCResult()
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| D | ScheduleDAGRRList.cpp | 289 if (!Node->isMachineOpcode() && Node->getOpcode() == ISD::CopyFromReg) { in GetCostForDef()
682 case ISD::CopyFromReg: in EmitNode()
1202 if (N->getOpcode() == ISD::CopyFromReg) { in getPhysicalRegisterVT()
2146 if (PN->getOpcode() == ISD::CopyFromReg) { in unscheduledNode()
2240 PredSU->getNode()->getOpcode() == ISD::CopyFromReg) { in hasOnlyLiveInOpers()
2314 assert(PredSU->getNode()->getOpcode() == ISD::CopyFromReg && in resetVRegCycle()
2332 I->getSUnit()->getNode()->getOpcode() == ISD::CopyFromReg) { in hasVRegCycleUse()
2864 if (N->getOpcode() == ISD::CopyFromReg && in PrescheduleNodesWithMultipleUses()
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| D | InstrEmitter.cpp | 352 Op.getNode()->getOpcode() != ISD::CopyFromReg && in AddRegisterOperand()
848 if (F->getOpcode() == ISD::CopyFromReg) { in EmitMachineNode()
911 case ISD::CopyFromReg: { in EmitSpecialNode()
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| D | ScheduleDAGSDNodes.cpp | 122 if (Def->getOpcode() == ISD::CopyFromReg && in CheckForPhysRegDependency()
530 if (Node->getOpcode() == ISD::CopyFromReg) in InitNodeNumDefs()
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| D | SelectionDAGDumper.cpp | 144 case ISD::CopyFromReg: return "CopyFromReg"; in getOperationName()
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| D | ScheduleDAGFast.cpp | 436 if (N->getOpcode() == ISD::CopyFromReg) { in getPhysicalRegisterVT()
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| D | LegalizeFloatTypes.cpp | 63 case ISD::CopyFromReg: in SoftenFloatResult()
782 case ISD::CopyFromReg: in CanSkipSoftenFloatOperand()
797 case ISD::CopyFromReg: in CanSkipSoftenFloatOperand()
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| D | SelectionDAGISel.cpp | 2128 UserOpcode == ISD::CopyFromReg || in WalkChainUsers()
2617 case ISD::CopyFromReg: in SelectCodeCommon()
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| D | SelectionDAGBuilder.cpp | 4235 case ISD::CopyFromReg: in getUnderlyingArgReg()
6860 if (HasDef && (CallEnd->getOpcode() == ISD::CopyFromReg)) in visitPatchpoint()
7266 assert((Op.getOpcode() != ISD::CopyFromReg || in CopyValueToVirtualRegister()
7517 if (!TM.Options.EnableFastISel && Res.getOpcode() == ISD::CopyFromReg) { in LowerArguments()
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| /external/llvm/test/CodeGen/X86/ |
| D | merge-store-partially-alias-loads.ll | 18 ; DBGDAG-DAG: [[BASEPTR:t[0-9]+]]: i64,ch = CopyFromReg [[ENTRYTOKEN]],
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| /external/llvm/lib/Target/X86/ |
| D | README-X86-64.txt | 46 emits a CopyFromReg which gets turned into a movb and that can be allocated a
49 To get around this, isel emits a CopyFromReg from AX and then right shift it
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| D | X86ISelDAGToDAG.cpp | 347 if (OtherOp->getOpcode() == ISD::CopyFromReg && in shouldAvoidImmediateInstFormsForSize()
1305 RHS.getNode()->getOpcode() == ISD::CopyFromReg || in matchAddressRecursively()
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| D | X86InstrCompiler.td | 1203 // register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may
1210 N->getOpcode() != ISD::CopyFromReg &&
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| D | X86ISelLowering.cpp | 3623 if (Arg.getOpcode() == ISD::CopyFromReg) { in MatchingStackOffset()
15074 T1.getOpcode() != ISD::CopyFromReg && T2.getOpcode()!=ISD::CopyFromReg){ in LowerSELECT()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 170 CopyFromReg, enumerator
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| D | SelectionDAG.h | 551 return getNode(ISD::CopyFromReg, dl, VTs, Ops);
561 return getNode(ISD::CopyFromReg, dl, VTs,
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.td | 294 // register. Truncate can be lowered to EXTRACT_SUBREG, and CopyFromReg may
300 N->getOpcode() != ISD::CopyFromReg;
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1334 if (SrcReg->getReg() == Reg && Chain->getOpcode() == ISD::CopyFromReg) in LowerCall_64()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 5198 // register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may
5205 N->getOpcode() != ISD::CopyFromReg;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 2036 if (Arg.getOpcode() == ISD::CopyFromReg) { in MatchingStackOffset()
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