/external/libhevc/common/arm/ |
D | ihevc_sao_edge_offset_class1_chroma.s | 203 VTBL.8 D25,{D8},D23 204 VZIP.8 D24,D25 207 … @VTBL.8 D25,D7,D23 @II offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 215 …VADDW.S8 Q14,Q14,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[… 251 VTBL.8 D25,{D8},D23 252 VZIP.8 D24,D25 260 @VTBL.8 D25,D7,D23 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 262 …VADDW.S8 Q14,Q14,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],… 352 VTBL.8 D25,{D8},D23 353 VZIP.8 D24,D25 [all …]
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D | ihevc_sao_band_offset_chroma.s | 209 VLD1.8 D25,[r8] @pi1_sao_offset_v load 212 VDUP.8 D29,D25[1] @vdup_n_u8(pi1_sao_offset_v[1]) 215 VDUP.8 D28,D25[2] @vdup_n_u8(pi1_sao_offset_v[2]) 218 VDUP.8 D27,D25[3] @vdup_n_u8(pi1_sao_offset_v[3]) 221 VDUP.8 D26,D25[4] @vdup_n_u8(pi1_sao_offset_v[4])
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D | ihevc_sao_edge_offset_class2_chroma.s | 530 VTBL.8 D25,{D7},D27 @II 534 VZIP.8 D24,D25 @II 557 …VADDW.S8 Q13,Q13,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[… 644 VTBL.8 D25,{D7},D27 645 VZIP.8 D24,D25 651 …VADDW.S8 Q9,Q9,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],… 796 VTBL.8 D25,{D7},D27 797 VZIP.8 D24,D25 805 …VADDW.S8 Q13,Q13,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],… 940 VTBL.8 D25,{D7},D27 [all …]
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D | ihevc_sao_edge_offset_class1.s | 196 … VTBL.8 D25,{D7},D23 @II offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 202 …VADDW.S8 Q14,Q14,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[… 242 VTBL.8 D25,{D7},D23 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 244 …VADDW.S8 Q14,Q14,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],…
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D | ihevc_sao_edge_offset_class0_chroma.s | 226 VTBL.8 D25,{D10},D25 @II vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx)) 231 VUZP.8 D24,D25 @II 238 VTBL.8 D27,{D0},D25 @II
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D | ihevc_sao_edge_offset_class3_chroma.s | 530 VTBL.8 D25,{D7},D27 @II 534 VZIP.8 D24,D25 @II 554 …VADDW.S8 Q13,Q13,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[… 820 VTBL.8 D25,{D7},D27 821 VZIP.8 D24,D25 830 …VADDW.S8 Q15,Q15,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],… 990 VTBL.8 D25,{D7},D27 991 VZIP.8 D24,D25
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D | ihevc_sao_edge_offset_class3.s | 424 … VTBL.8 D25,{D7},D27 @II offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 438 …VADDW.S8 Q13,Q13,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[… 521 VTBL.8 D25,{D7},D27 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 526 …VADDW.S8 Q11,Q11,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],… 668 VTBL.8 D25,{D7},D27 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 670 …VADDW.S8 Q15,Q15,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],…
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D | ihevc_sao_edge_offset_class2.s | 301 VTBL.8 D19,{D6},D25 @I vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx)) 412 … VTBL.8 D25,{D7},D23 @II offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 418 …VADDW.S8 Q14,Q14,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[… 627 VTBL.8 D25,{D7},D27 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 629 …VADDW.S8 Q15,Q15,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],…
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D | ihevc_sao_edge_offset_class0.s | 313 VTBL.8 D25,{D10},D25 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
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/external/llvm/test/MC/MachO/ |
D | x86_64-symbols.s | 80 D25: label
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D | x86_32-symbols.s | 80 D25: label
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/external/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.td | 218 def D25 : SparcReg<19, "F50">; 239 def Q12 : Rq<17, "F48", [D24, D25]>;
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/external/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.h | 137 case AArch64::D25: return AArch64::B25; in getBRegFromDReg() 177 case AArch64::B25: return AArch64::D25; in getDRegFromBReg()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.cpp | 76 case AArch64::D25: in isOdd()
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D | AArch64RegisterInfo.td | 345 def D25 : AArch64Reg<25, "d25", [S25], ["v25", ""]>, DwarfRegAlias<B25>; 380 def Q25 : AArch64Reg<25, "q25", [D25], ["v25", ""]>, DwarfRegAlias<B25>;
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/external/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 128 def D25 : ARMFReg<25, "d25">, DwarfRegNum<[281]>; 152 def Q12 : ARMReg<12, "q12", [D24, D25]>;
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/external/llvm/lib/Target/Sparc/Disassembler/ |
D | SparcDisassembler.cpp | 92 SP::D8, SP::D24, SP::D9, SP::D25,
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/external/valgrind/memcheck/ |
D | mc_machine.c | 899 if (o >= GOF(D25) && o+sz <= GOF(D25)+SZB(D25)) return GOF(D25); in get_otrack_shadow_offset_wrk()
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/external/icu/icu4c/source/data/unidata/ |
D | DerivedCoreProperties.txt | 757 2D00..2D25 ; Alphabetic 1709 2D00..2D25 ; Lowercase 2586 2D00..2D25 ; Cased 4150 2D00..2D25 ; Changes_When_Uppercased 4766 2D00..2D25 ; Changes_When_Titlecased 5585 2D00..2D25 ; Changes_When_Casemapped 5921 2D00..2D25 ; ID_Start 6844 2D00..2D25 ; ID_Continue 7671 2D00..2D25 ; XID_Start 8594 2D00..2D25 ; XID_Continue [all …]
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/external/llvm/lib/Target/Sparc/AsmParser/ |
D | SparcAsmParser.cpp | 128 Sparc::D24, Sparc::D25, Sparc::D26, Sparc::D27,
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/external/gptfdisk/ |
D | NEWS | 10 4FBD7E29-9D25-41B8-AFD0-062C0CEFF05D/0xf800 (Ceph OSD), 11 4FBD7E29-9D25-41B8-AFD0-5EC00CEFF05D/0xf801 (Ceph dm-crypt OSD),
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/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 290 AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29,
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/external/icu/icu4c/source/data/unidata/norm2/ |
D | nfkc_cf.txt | 630 10C5>2D25 688 1D5C>1D25
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D | nfkc.txt | 142 1D5C>1D25
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/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/es-ES/ |
D | es-ES_zl0_kpdf_mgc.pkb | 87 ����H����z����� T�4q��ID[F<;|bL^Ujvg=04T1/\D25)$O.8PdP;@=V__RFeo^~<?FNgev9:LDm}stm�…
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