Searched refs:DEXTM (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MicroMips64r6InstrInfo.td | 70 // DEXTM, DEXTU: 32 < pos + size <= 64
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| D | Mips64InstrInfo.td | 278 // DEXTM, DEXTU: 32 < pos + size <= 64
281 def DEXTM : ExtBase<"dextm", GPR64Opnd, uimm5, uimm5_plus33, MipsExt>,
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 489 DEXTM = ((0U << 3) + 1), enumerator
1231 case DEXTM: in InstructionType()
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| D | assembler-mips64.cc | 2434 GenInstrRegister(SPECIAL3, rs, rt, size - 1 - 32, pos, DEXTM); in dextm()
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| D | simulator-mips64.cc | 3896 case DEXTM: { in DecodeTypeRegisterSPECIAL3()
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 111 InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTM : Mips::DINSM); in LowerDextDins()
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| /external/valgrind/none/tests/mips64/ |
| D | extract_insert_bit_field.stdout.exp-mips64r2 | 664 --- DEXTM ---
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