Searched refs:DstMO (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXCopy.cpp | 99 MachineOperand &DstMO = MI->getOperand(0); in processBlock() local
102 if ( IsVSReg(DstMO.getReg(), MRI) && in processBlock()
127 } else if (!IsVSReg(DstMO.getReg(), MRI) && in processBlock()
133 IsVRReg(DstMO.getReg(), MRI) ? &PPC::VSHRCRegClass : in processBlock()
135 assert((IsF8Reg(DstMO.getReg(), MRI) || in processBlock()
136 IsVSFReg(DstMO.getReg(), MRI) || in processBlock()
137 IsVSSReg(DstMO.getReg(), MRI) || in processBlock()
138 IsVRReg(DstMO.getReg(), MRI)) && in processBlock()
149 SrcMO.setSubReg(IsVRReg(DstMO.getReg(), MRI) ? PPC::sub_128 : in processBlock()
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| /external/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 146 MachineOperand &DstMO = MI->getOperand(0); in LowerCopy() local
149 if (SrcMO.getReg() == DstMO.getReg()) { in LowerCopy()
167 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill()); in LowerCopy()
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| D | TwoAddressInstructionPass.cpp | 1419 MachineOperand &DstMO = MI->getOperand(DstIdx); in collectTiedOperands() local
1421 unsigned DstReg = DstMO.getReg(); in collectTiedOperands()
1429 if (SrcMO.isUndef() && !DstMO.getSubReg()) { in collectTiedOperands()
1453 const MachineOperand &DstMO = MI->getOperand(TiedPairs[tpi].second); in processTiedPairs() local
1454 IsEarlyClobber |= DstMO.isEarlyClobber(); in processTiedPairs()
1467 const MachineOperand &DstMO = MI->getOperand(DstIdx); in processTiedPairs() local
1468 unsigned RegA = DstMO.getReg(); in processTiedPairs()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 760 MachineOperand &DstMO = MIB->getOperand(SExtIdx); in mergePairedInsns() local
763 unsigned DstRegX = DstMO.getReg(); in mergePairedInsns()
767 DstMO.setReg(DstRegW); in mergePairedInsns()
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