Searched refs:DstOp (Results 1 – 4 of 4) sorted by relevance
85 MachineOperand &DstOp = MI.getOperand(DstIdx); in runOnMachineFunction() local87 DstOp.getReg(), AMDGPU::OQAP); in runOnMachineFunction()88 DstOp.setReg(AMDGPU::OQAP); in runOnMachineFunction()
1305 MDNode *DstOp; in linkModuleFlagsMetadata() local1307 std::tie(DstOp, DstIndex) = Flags.lookup(ID); in linkModuleFlagsMetadata()1321 if (!DstOp) { in linkModuleFlagsMetadata()1329 mdconst::extract<ConstantInt>(DstOp->getOperand(0)); in linkModuleFlagsMetadata()1336 SrcOp->getOperand(2) != DstOp->getOperand(2)) { in linkModuleFlagsMetadata()1356 Metadata *FlagOps[] = {DstOp->getOperand(0), ID, New}; in linkModuleFlagsMetadata()1369 if (SrcOp->getOperand(2) != DstOp->getOperand(2)) { in linkModuleFlagsMetadata()1377 if (SrcOp->getOperand(2) != DstOp->getOperand(2)) { in linkModuleFlagsMetadata()1384 MDNode *DstValue = cast<MDNode>(DstOp->getOperand(2)); in linkModuleFlagsMetadata()1396 MDNode *DstValue = cast<MDNode>(DstOp->getOperand(2)); in linkModuleFlagsMetadata()
1023 static std::string getShuffleComment(const MachineOperand &DstOp, in getShuffleComment() argument1037 StringRef DstName = DstOp.isReg() ? GetRegisterName(DstOp.getReg()) : "mem"; in getShuffleComment()1282 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local1290 OutStreamer->AddComment(getShuffleComment(DstOp, SrcOp, Mask)); in EmitInstruction()1302 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local1310 OutStreamer->AddComment(getShuffleComment(DstOp, SrcOp, Mask)); in EmitInstruction()1352 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local1353 CS << X86ATTInstPrinter::getRegisterName(DstOp.getReg()) << " = "; in EmitInstruction()
1805 AMDGPUOperand &DstOp = ((AMDGPUOperand&)*Operands[1]); in isVOP3() local1807 if (DstOp.isReg() && DstOp.isRegClass(AMDGPU::SGPR_64RegClassID)) in isVOP3()