| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 516 FLOG, FLOG2, FLOG10, FEXP, FEXP2, enumerator
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| D | BasicTTIImpl.h | 639 ISD = ISD::FLOG2; in getIntrinsicInstrCost()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 171 case ISD::FLOG2: return "flog2"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 88 case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break; in SoftenFloatResult()
1010 case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break; in ExpandFloatResult()
1858 case ISD::FLOG2: in PromoteFloatResult()
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| D | LegalizeVectorOps.cpp | 313 case ISD::FLOG2: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 85 case ISD::FLOG2: in ScalarizeVectorResult()
640 case ISD::FLOG2: in SplitVectorResult()
2098 case ISD::FLOG2: in WidenVectorResult()
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| D | LegalizeDAG.cpp | 4055 case ISD::FLOG2: in ConvertNodeToLibcall()
4449 case ISD::FLOG2: in PromoteNode()
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| D | SelectionDAGBuilder.cpp | 4041 return DAG.getNode(ISD::FLOG2, dl, Op.getValueType(), Op); in expandLog2()
5870 if (visitUnaryFloatCall(I, ISD::FLOG2)) in visitCall()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 841 setOperationAction(ISD::FLOG2, VT, Expand); in initActions()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 314 setOperationAction(ISD::FLOG2, Ty, Legal); in addMSAFloatType()
1875 return DAG.getNode(ISD::FLOG2, DL, Op->getValueType(0), Op->getOperand(1)); in lowerINTRINSIC_WO_CHAIN()
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| D | MipsISelLowering.cpp | 369 setOperationAction(ISD::FLOG2, MVT::f32, Expand); in MipsTargetLowering()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 87 setOperationAction(ISD::FLOG2, MVT::f32, Legal); in AMDGPUTargetLowering()
349 setOperationAction(ISD::FLOG2, VT, Expand); in AMDGPUTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 435 def flog2 : SDNode<"ISD::FLOG2" , SDTFPUnaryOp>;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 301 setOperationAction(ISD::FLOG2, MVT::f16, Promote); in AArch64TargetLowering()
352 setOperationAction(ISD::FLOG2, MVT::v4f16, Expand); in AArch64TargetLowering()
386 setOperationAction(ISD::FLOG2, MVT::v8f16, Expand); in AArch64TargetLowering()
653 setOperationAction(ISD::FLOG2, VT.getSimpleVT(), Expand); in addTypeForNEON()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 507 setOperationAction(ISD::FLOG2, MVT::v2f64, Expand); in ARMTargetLowering()
525 setOperationAction(ISD::FLOG2, MVT::v4f32, Expand); in ARMTargetLowering()
542 setOperationAction(ISD::FLOG2, MVT::v2f32, Expand); in ARMTargetLowering()
666 setOperationAction(ISD::FLOG2, MVT::f64, Expand); in ARMTargetLowering()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1759 ISD::FCOS, ISD::FPOWI, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 458 setOperationAction(ISD::FLOG2, VT, Expand); in PPCTargetLowering()
700 setOperationAction(ISD::FLOG2 , MVT::v4f64, Expand); in PPCTargetLowering()
746 setOperationAction(ISD::FLOG2 , MVT::v4f32, Expand); in PPCTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 674 setOperationAction(ISD::FLOG2, MVT::f80, Expand); in X86TargetLowering()
738 setOperationAction(ISD::FLOG2, VT, Expand); in X86TargetLowering()
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