Home
last modified time | relevance | path

Searched refs:FalseReg (Results 1 – 9 of 9) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h182 unsigned TrueReg, unsigned FalseReg) const override;
DPPCInstrInfo.cpp685 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
701 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
726 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
736 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
765 unsigned FirstReg = SwapOps ? FalseReg : TrueReg, in insertSelect()
766 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect()
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h151 unsigned TrueReg, unsigned FalseReg) const override;
DAArch64InstrInfo.cpp362 unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, in canInsertSelect() argument
367 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
383 else if (canFoldIntoCSel(MRI, FalseReg)) in canInsertSelect()
405 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
513 TrueReg = FalseReg; in insertSelect()
515 FoldedOpc = canFoldIntoCSel(MRI, FalseReg, &NewVReg); in insertSelect()
519 FalseReg = NewVReg; in insertSelect()
528 MRI.constrainRegClass(FalseReg, RC); in insertSelect()
531 BuildMI(MBB, I, DL, get(Opc), DstReg).addReg(TrueReg).addReg(FalseReg).addImm( in insertSelect()
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h653 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
677 unsigned TrueReg, unsigned FalseReg) const { in insertSelect() argument
/external/llvm/lib/Target/X86/
DX86InstrInfo.h331 unsigned TrueReg, unsigned FalseReg) const override;
DX86InstrInfo.cpp4197 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
4211 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
4234 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
4240 BuildMI(MBB, I, DL, get(Opc), DstReg).addReg(FalseReg).addReg(TrueReg); in insertSelect()
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp1899 MachineOperand FalseReg = MI->getOperand(Invert ? 2 : 1); in optimizeSelect() local
1901 const TargetRegisterClass *PreviousClass = MRI.getRegClass(FalseReg.getReg()); in optimizeSelect()
1931 FalseReg.setImplicit(); in optimizeSelect()
1932 NewMI.addOperand(FalseReg); in optimizeSelect()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp4877 unsigned FalseReg = MI->getOperand(2).getReg(); in emitSelect() local
4906 .addReg(FalseReg).addMBB(FalseMBB); in emitSelect()