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/external/llvm/test/CodeGen/AArch64/
Dnontemporal.ll16 ; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1]
17 ; CHECK-NEXT: stnp d0, d[[HI]], [x0]
25 ; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1]
26 ; CHECK-NEXT: stnp d0, d[[HI]], [x0]
34 ; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1]
35 ; CHECK-NEXT: stnp d0, d[[HI]], [x0]
43 ; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1]
44 ; CHECK-NEXT: stnp s0, s[[HI]], [x0]
52 ; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1]
53 ; CHECK-NEXT: stnp s0, s[[HI]], [x0]
[all …]
Dbasic-pic.ll32 ; CHECK: adrp x[[HI:[0-9]+]], hiddenvar
33 ; CHECK: ldr w0, [x[[HI]], {{#?}}:lo12:hiddenvar]
42 ; CHECK: adrp [[HI:x[0-9]+]], hiddenvar
43 ; CHECK: add x0, [[HI]], {{#?}}:lo12:hiddenvar
Darm64-basic-pic.ll32 ; CHECK: adrp x[[HI:[0-9]+]], hiddenvar
33 ; CHECK: ldr w0, [x[[HI]], :lo12:hiddenvar]
42 ; CHECK: adrp [[HI:x[0-9]+]], hiddenvar
43 ; CHECK: add x0, [[HI]], :lo12:hiddenvar
Dmul-lohi.ll26 ; CHECK: umulh [[HI:x[0-9]+]], x0, x2
27 ; CHECK-NEXT: madd [[TEMP1:x[0-9]+]], x0, x3, [[HI]]
38 ; CHECK: umulh [[HI:x[0-9]+]], x0, x2
39 ; CHECK-NEXT: madd [[TEMP1:x[0-9]+]], x0, x3, [[HI]]
Dfp16-v8-instructions.ll261 ; CHECK-NEXT: sshll [[HI:v[0-9]+\.4s]], v[[REG1]].4h, #0
262 ; CHECK-DAG: scvtf [[HIF:v[0-9]+\.4s]], [[HI]]
275 ; CHECK-NEXT: sshll [[HI:v[0-9]+\.4s]], v0.4h, #0
276 ; CHECK-DAG: scvtf [[HIF:v[0-9]+\.4s]], [[HI]]
313 ; CHECK-NEXT: ushll [[HI:v[0-9]+\.4s]], v[[REG1]].4h, #0
314 ; CHECK-DAG: ucvtf [[HIF:v[0-9]+\.4s]], [[HI]]
327 ; CHECK-NEXT: ushll [[HI:v[0-9]+\.4s]], v0.4h, #0
328 ; CHECK-DAG: ucvtf [[HIF:v[0-9]+\.4s]], [[HI]]
373 ; CHECK-DAG: fcvtl2 [[HI:v[0-9]+\.4s]], v0.8h
376 ; CHECK-DAG: fcvtzs [[HIF32:v[0-9]+\.4s]], [[HI]]
[all …]
/external/pcre/dist/sljit/
DsljitNativePPC_common.c129 #define HI(opcode) ((opcode) << 26) macro
132 #define ADD (HI(31) | LO(266))
133 #define ADDC (HI(31) | LO(10))
134 #define ADDE (HI(31) | LO(138))
135 #define ADDI (HI(14))
136 #define ADDIC (HI(13))
137 #define ADDIS (HI(15))
138 #define ADDME (HI(31) | LO(234))
139 #define AND (HI(31) | LO(28))
140 #define ANDI (HI(28))
[all …]
DsljitNativeMIPS_common.c93 #define HI(opcode) ((opcode) << 26) macro
98 #define ABS_S (HI(17) | FMT_S | LO(5))
99 #define ADD_S (HI(17) | FMT_S | LO(0))
100 #define ADDIU (HI(9))
101 #define ADDU (HI(0) | LO(33))
102 #define AND (HI(0) | LO(36))
103 #define ANDI (HI(12))
104 #define B (HI(4))
105 #define BAL (HI(1) | (17 << 16))
106 #define BC1F (HI(17) | (8 << 21))
[all …]
/external/llvm/lib/CodeGen/AsmPrinter/
DDwarfAccelTable.cpp166 for (HashList::const_iterator HI = Buckets[i].begin(), in EmitHashes() local
168 HI != HE; ++HI) { in EmitHashes()
169 uint32_t HashValue = (*HI)->HashValue; in EmitHashes()
186 for (HashList::const_iterator HI = Buckets[i].begin(), in emitOffsets() local
188 HI != HE; ++HI) { in emitOffsets()
189 uint32_t HashValue = (*HI)->HashValue; in emitOffsets()
196 MCSymbolRefExpr::create((*HI)->Sym, Context), in emitOffsets()
209 for (HashList::const_iterator HI = Buckets[i].begin(), in EmitData() local
211 HI != HE; ++HI) { in EmitData()
214 if (PrevHash != UINT64_MAX && PrevHash != (*HI)->HashValue) in EmitData()
[all …]
DAsmPrinter.cpp404 for (const HandlerInfo &HI : Handlers) { in EmitGlobalVariable() local
405 NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled); in EmitGlobalVariable()
406 HI.Handler->setSymbolSize(GVSym, Size); in EmitGlobalVariable()
597 for (const HandlerInfo &HI : Handlers) { in EmitFunctionHeader() local
598 NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled); in EmitFunctionHeader()
599 HI.Handler->beginFunction(MF); in EmitFunctionHeader()
858 for (const HandlerInfo &HI : Handlers) { in EmitFunctionBody() local
859 NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, in EmitFunctionBody()
861 HI.Handler->beginInstruction(&MI); in EmitFunctionBody()
902 for (const HandlerInfo &HI : Handlers) { in EmitFunctionBody() local
[all …]
/external/valgrind/none/tests/mips64/
Darithmetic_instruction.stdout.exp-mips64r28961 ddiv $t0, $t1 :: rs 0x0, rt 0xffffffffb1f740b4, HI 0x0, LO 0x0
8962 ddiv $v0, $v1 :: rs 0x12bd6aa, rt 0xa2a6ec661ba84121, HI 0x12bd6aa, LO 0x0
8963 ddiv $t0, $t1 :: rs 0x0, rt 0xffffffffb5365d03, HI 0x0, LO 0x0
8964 ddiv $v0, $v1 :: rs 0x7e876382d2ab13, rt 0x614d9b445f12236b, HI 0x7e876382d2ab13, LO 0x0
8965 ddiv $t0, $t1 :: rs 0x9823b6e, rt 0xffffffffb8757bda, HI 0x9823b6e, LO 0x0
8966 ddiv $v0, $v1 :: rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75, HI 0xd31807e1e2825e68, LO 0xffffffff…
8967 ddiv $t0, $t1 :: rs 0xd4326d9, rt 0xffffffffbcb4666d, HI 0xd4326d9, LO 0x0
8968 ddiv $v0, $v1 :: rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666, HI 0xb7746d775ad6a5fb, LO 0x0
8969 ddiv $t0, $t1 :: rs 0x130476dc, rt 0xffffffffa2f33668, HI 0x130476dc, LO 0x0
8970 ddiv $v0, $v1 :: rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17, HI 0x42b0c0a28677b502, LO 0x0
[all …]
Darithmetic_instruction.stdout.exp-mips648961 ddiv $t0, $t1 :: rs 0x0, rt 0xffffffffb1f740b4, HI 0x0, LO 0x0
8962 ddiv $v0, $v1 :: rs 0x12bd6aa, rt 0xa2a6ec661ba84121, HI 0x12bd6aa, LO 0x0
8963 ddiv $t0, $t1 :: rs 0x0, rt 0xffffffffb5365d03, HI 0x0, LO 0x0
8964 ddiv $v0, $v1 :: rs 0x7e876382d2ab13, rt 0x614d9b445f12236b, HI 0x7e876382d2ab13, LO 0x0
8965 ddiv $t0, $t1 :: rs 0x9823b6e, rt 0xffffffffb8757bda, HI 0x9823b6e, LO 0x0
8966 ddiv $v0, $v1 :: rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75, HI 0xd31807e1e2825e68, LO 0xffffffff…
8967 ddiv $t0, $t1 :: rs 0xd4326d9, rt 0xffffffffbcb4666d, HI 0xd4326d9, LO 0x0
8968 ddiv $v0, $v1 :: rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666, HI 0xb7746d775ad6a5fb, LO 0x0
8969 ddiv $t0, $t1 :: rs 0x130476dc, rt 0xffffffffa2f33668, HI 0x130476dc, LO 0x0
8970 ddiv $v0, $v1 :: rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17, HI 0x42b0c0a28677b502, LO 0x0
[all …]
Dmacro_int.h53 unsigned long long HI; \
63 : "=r" (HI), "=r" (LO) \
68 instruction, (long long) RSval, (long long) RTval, HI, LO); \
73 unsigned long long HI; \
83 : "=r" (HI), "=r" (LO) \
88 instruction, (long long) RSval, (long long) RTval, HI, LO); \
/external/pdfium/core/src/fxcodec/jbig2/
DJBig2_TrdProc.cpp23 FX_DWORD WI, HI; in decode_Huffman() local
159 HI = IBI->m_nHeight; in decode_Huffman()
165 CURS = CURS + HI - 1; in decode_Huffman()
177 SBREG->composeFrom(SI, TI - HI + 1, IBI, SBCOMBOP); in decode_Huffman()
180 SBREG->composeFrom(SI - WI + 1, TI - HI + 1, IBI, SBCOMBOP); in decode_Huffman()
192 SBREG->composeFrom(TI, SI - HI + 1, IBI, SBCOMBOP); in decode_Huffman()
195 SBREG->composeFrom(TI - WI + 1, SI - HI + 1, IBI, SBCOMBOP); in decode_Huffman()
207 CURS = CURS + HI - 1; in decode_Huffman()
223 FX_DWORD WI, HI; in decode_Arith() local
333 HI = IBI->m_nHeight; in decode_Arith()
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dfp128-bitcast-after-operation.ll16 ; PPC64-DAG: ld [[HI:[0-9]+]], [[OFFSET_LO]]([[SP]])
18 ; PPC64: and [[FLIP_BIT:[0-9]+]], [[HI]], [[MASK_REG]]
19 ; PPC64-DAG: xor 3, [[HI]], [[FLIP_BIT]]
25 ; PPC64-P8-DAG: mfvsrd [[HI:[0-9]+]], 1
28 ; PPC64-P8: and [[FLIP_BIT:[0-9]+]], [[HI]], [[SHIFT_REG]]
29 ; PPC64-P8-DAG: xor 3, [[HI]], [[FLIP_BIT]]
58 ; PPC64-DAG: ld [[HI:[0-9]+]], [[OFFSET_LO]]([[SP]])
61 ; PPC64-DAG: xor 3, [[HI]], [[FLIP_BIT]]
67 ; PPC64-P8-DAG: mfvsrd [[HI:[0-9]+]], 1
71 ; PPC64-P8-DAG: xor 3, [[HI]], [[FLIP_BIT]]
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dllvm.AMDGPU.fract.f64.ll9 ; GCN: v_fract_f64_e32 [[FRC:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]]
13 ; SI: v_cmp_class_f64_e64 [[COND:s\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]], 3
15 ; SI: v_cndmask_b32_e64 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], [[COND]]
26 ; GCN: v_fract_f64_e64 [[FRC:v\[[0-9]+:[0-9]+\]]], -v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]]
30 ; SI: v_cmp_class_f64_e64 [[COND:s\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]], 3
32 ; SI: v_cndmask_b32_e64 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], [[COND]]
44 ; GCN: v_fract_f64_e64 [[FRC:v\[[0-9]+:[0-9]+\]]], -|v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]]|
48 ; SI: v_cmp_class_f64_e64 [[COND:s\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]], 3
50 ; SI: v_cndmask_b32_e64 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], [[COND]]
Dhsa.ll47 ; HSA-CI: s_mov_b32 s[[HI:[0-9]]], 0x100f000
49 ; HSA-VI: s_mov_b32 s[[HI:[0-9]]], 0x1100f000
50 ; HSA: buffer_store_dword v{{[0-9]+}}, s[0:[[HI]]], 0
Dadd.ll127 ; EG: MEM_RAT_CACHELESS STORE_RAW [[HI:T[0-9]+\.[XYZW]]]
131 ; EG-DAG: ADD_INT {{[* ]*}}[[HI]]
149 ; EG: MEM_RAT_CACHELESS STORE_RAW [[HI:T[0-9]+\.[XYZW]]]
153 ; EG-DAG: ADD_INT {{[* ]*}}[[HI]]
169 ; EG: MEM_RAT_CACHELESS STORE_RAW [[HI:T[0-9]+\.[XYZW]]]
173 ; EG-DAG: ADD_INT {{[* ]*}}[[HI]]
Dsub.ll62 ; EG: MEM_RAT_CACHELESS STORE_RAW [[HI:T[0-9]+\.[XYZW]]]
66 ; EG-DAG: SUB_INT {{[* ]*}}[[HI]]
79 ; EG: MEM_RAT_CACHELESS STORE_RAW [[HI:T[0-9]+\.[XYZW]]]
83 ; EG-DAG: SUB_INT {{[* ]*}}[[HI]]
/external/valgrind/none/tests/mips32/
DMIPS32int.stdout.exp-mips32-LE99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff
103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000
109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
[all …]
DMIPS32int.stdout.exp-mips32-BE99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff
103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000
109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
[all …]
DMIPS32int.stdout.exp-mips32r2-LE99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff
103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000
109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
[all …]
DMIPS32int.stdout.exp-mips32r2-BE99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff
103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000
109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
[all …]
/external/icu/icu4c/source/data/translit/
DKatakana_Latin_BGN.txt73 ヒョウ → hyō ; # KATAKANA LETTER HI + SMALL YO + U
74 ヒュウ → hyū ; # KATAKANA LETTER HI + SMALL YU + U
75 ヒャ → hya ; # KATAKANA LETTER HI + SMALL YA
76 ヒョ → hyo ; # KATAKANA LETTER HI + SMALL YO
77 ヒュ → hyu ; # KATAKANA LETTER HI + SMALL YU
78 ヒ → hi ; # KATAKANA LETTER HI
220 ひょう → hyō ; # HIRAGANA LETTER HI + SMALL YO + U
221 ひゅう → hyū ; # HIRAGANA LETTER HI + SMALL YU + U
222 ひゃ → hya ; # HIRAGANA LETTER HI + SMALL YA
223 ひょ → hyo ; # HIRAGANA LETTER HI + SMALL YO
[all …]
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMBaseInfo.h38 HI, // Unsigned higher Greater than, or unordered enumerator
58 case HI: return LS; in getOppositeCondition()
59 case LS: return HI; in getOppositeCondition()
78 case ARMCC::HI: return "hi"; in ARMCondCodeToString()
/external/aac/libSBRenc/src/
Dsbr_encoder.cpp712 if (hSbrElement->sbrConfigData.freqBandTable[HI]) in sbrEncoder_ElementClose()
713 FreeRam_Sbr_freqBandTableHI(&hSbrElement->sbrConfigData.freqBandTable[HI]); in sbrEncoder_ElementClose()
811 sbrConfigData->freqBandTable[HI], in updateFreqBandTable()
812 &sbrConfigData->nSfb[HI], in updateFreqBandTable()
824 sbrConfigData->freqBandTable[HI], in updateFreqBandTable()
825 sbrConfigData->nSfb[HI] in updateFreqBandTable()
854 sbrConfigData->freqBandTable[HI][0], in resetEnvChannel()
864 hEnv->sbrCodeNoiseFloor.nSfb[HI] = hEnv->TonCorr.sbrNoiseFloorEstimate.noNoiseBands; in resetEnvChannel()
867 hEnv->sbrCodeEnvelope.nSfb[HI] = sbrConfigData->nSfb[HI]; in resetEnvChannel()
869 hEnv->encEnvData.noHarmonics = sbrConfigData->nSfb[HI]; in resetEnvChannel()
[all …]

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