| /external/llvm/test/CodeGen/PowerPC/ |
| D | branch-hint.ll | 2 …riple=powerpc64-unknown-linux-gnu -ppc-use-branch-hint=true | FileCheck %s -check-prefix=CHECK-HINT
19 ; CHECK-HINT-LABEL: branch_hint_1:
20 ; CHECK-HINT: beq-
39 ; CHECK-HINT-LABEL: @branch_hint_2
40 ; CHECK-HINT: bne-
62 ; CHECK-HINT-LABEL: @branch_hint_3
63 ; CHECK-HINT: bne
81 ; CHECK-HINT-LABEL: branch_hint_4
82 ; CHECK-HINT: bne
99 ; CHECK-HINT-LABEL: branch_hint_5:
[all …]
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| /external/llvm/test/tools/llvm-symbolizer/ |
| D | dsym.test | 4 …hint=%p/Inputs/dsym-test-exe-differentname.dSYM < %t.input | FileCheck %s --check-prefix=CHECK-HINT
11 CHECK-HINT: main
12 CHECK-HINT: dsym-test.c
13 CHECK-HINT: main
14 CHECK-HINT: dsym-test.c
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64A53Fix835769.cpp | 171 BuildMI(I->getParent(), DL, TII->get(AArch64::HINT)).addImm(0); in insertNopBeforeInstruction()
175 BuildMI(MBB, MI, DL, TII->get(AArch64::HINT)).addImm(0); in insertNopBeforeInstruction()
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| D | AArch64AsmPrinter.cpp | 388 EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::HINT).addImm(0)); in LowerSTACKMAP()
430 EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::HINT).addImm(0)); in LowerPATCHPOINT()
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| D | AArch64InstrInfo.td | 379 def HINT : HintI<"hint">;
380 def : InstAlias<"nop", (HINT 0b000)>;
381 def : InstAlias<"yield",(HINT 0b001)>;
382 def : InstAlias<"wfe", (HINT 0b010)>;
383 def : InstAlias<"wfi", (HINT 0b011)>;
384 def : InstAlias<"sev", (HINT 0b100)>;
385 def : InstAlias<"sevl", (HINT 0b101)>;
388 def : InstAlias<"psb $op", (HINT psbhint_op:$op)>, Requires<[HasSPE]>;
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| D | AArch64InstrInfo.cpp | 2393 NopInst.setOpcode(AArch64::HINT); in getNoopForMachoTarget()
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| /external/clang/include/clang/Basic/ |
| D | BuiltinsAArch64.def | 30 // HINT
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| D | BuiltinsARM.def | 70 // HINT
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.cpp | 38 NopInst.setOpcode(ARM::HINT); in getNoopForMachoTarget()
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| D | ARMInstrInfo.td | 1877 def HINT : AI<(outs), (ins imm0_239:$imm), MiscFrm, NoItinerary,
1885 def : InstAlias<"nop$p", (HINT 0, pred:$p)>, Requires<[IsARM, HasV6K]>;
1886 def : InstAlias<"yield$p", (HINT 1, pred:$p)>, Requires<[IsARM, HasV6K]>;
1887 def : InstAlias<"wfe$p", (HINT 2, pred:$p)>, Requires<[IsARM, HasV6K]>;
1888 def : InstAlias<"wfi$p", (HINT 3, pred:$p)>, Requires<[IsARM, HasV6K]>;
1889 def : InstAlias<"sev$p", (HINT 4, pred:$p)>, Requires<[IsARM, HasV6K]>;
1890 def : InstAlias<"sevl$p", (HINT 5, pred:$p)>, Requires<[IsARM, HasV8]>;
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| /external/elfutils/backends/ |
| D | alpha_reloc.def | 39 RELOC_TYPE (HINT, REL)
|
| /external/icu/icu4c/source/samples/msgfmt/ |
| D | README.TXT | 63 HINT: Your message pattern should have a "number" element and a
|
| /external/curl/packages/Win32/cygwin/ |
| D | README | 90 ---SETUP.HINT---
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| /external/opencv/cxcore/src/ |
| D | cxnorm.cpp | 841 ICV_DEF_NORM_FUNC_ALL_L1( 32f, fabs, fabs, HINT, NOHINT,
885 ICV_DEF_NORM_FUNC_ALL_L2( 32f, HINT, NOHINT, float,
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| D | cxsumpixels.cpp | 374 ICV_DEF_SUM_ALL( Sum, 32f, CV_NOP, float, double, double, double, HINT, NOHINT, 0 )
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| /external/llvm/include/llvm/IR/ |
| D | IntrinsicsAArch64.td | 39 // HINT
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| D | IntrinsicsARM.td | 135 // HINT
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| /external/antlr/antlr-3.4/runtime/C/doxygen/ |
| D | buildrec.dox | 247 /// nodes = antlr3CommonTreeNodeStreamNewTree(langAST.tree, ANTLR3_SIZE_HINT); // sIZE HINT WILL …
|
| /external/v8/src/arm64/ |
| D | constants-arm64.h | 668 HINT = SystemHintFixed | 0x00000000 enumerator
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| D | disasm-arm64.cc | 1158 DCHECK(instr->Mask(SystemHintMask) == HINT); in VisitSystem()
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| D | assembler-arm64.cc | 1726 Emit(HINT | ImmHint(code) | Rt(xzr)); in hint()
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| D | simulator-arm64.cc | 3231 DCHECK(instr->Mask(SystemHintMask) == HINT); in VisitSystem()
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 76 case ARM::HINT: in printInst()
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| /external/vixl/src/vixl/a64/ |
| D | constants-a64.h | 695 HINT = SystemHintFixed | 0x00000000 enumerator
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| D | simulator-a64.cc | 2355 VIXL_ASSERT(instr->Mask(SystemHintMask) == HINT); in VisitSystem()
|