Searched refs:InstInfo (Results 1 – 4 of 4) sorted by relevance
| /external/mesa3d/src/mesa/program/ |
| D | prog_instruction.c | 154 static const struct instruction_info InstInfo[MAX_OPCODE] = { variable
260 ASSERT(opcode == InstInfo[opcode].Opcode); in _mesa_num_inst_src_regs()
261 ASSERT(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode); in _mesa_num_inst_src_regs()
262 return InstInfo[opcode].NumSrcRegs; in _mesa_num_inst_src_regs()
273 ASSERT(opcode == InstInfo[opcode].Opcode); in _mesa_num_inst_dst_regs()
274 ASSERT(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode); in _mesa_num_inst_dst_regs()
275 return InstInfo[opcode].NumDstRegs; in _mesa_num_inst_dst_regs()
347 return InstInfo[opcode].Name; in _mesa_opcode_string()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 1243 CodeGenInstruction &InstInfo = CDP.getTargetInfo().getInstruction(Operator); in GetNumNodeResults() local
1245 unsigned NumDefsToAdd = InstInfo.Operands.NumDefs; in GetNumNodeResults()
1248 for (unsigned i = 0; i != InstInfo.Operands.NumDefs; ++i) { in GetNumNodeResults()
1249 Record *OperandNode = InstInfo.Operands[i].Rec; in GetNumNodeResults()
1257 if (InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()) !=MVT::Other) in GetNumNodeResults()
1823 CodeGenInstruction &InstInfo = in ApplyTypeConstraints() local
1830 unsigned NumResultsToAdd = std::min(InstInfo.Operands.NumDefs, in ApplyTypeConstraints()
1837 if (!InstInfo.ImplicitDefs.empty()) { in ApplyTypeConstraints()
1843 InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()); in ApplyTypeConstraints()
1942 if (!InstInfo.Operands.isVariadic && ChildNo != getNumChildren()) { in ApplyTypeConstraints()
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 62 ParseInstructionInfo *InstInfo; member in __anon6c2cceda0111::X86AsmParser
807 : MCTargetAsmParser(Options, sti), MII(mii), InstInfo(nullptr) { in X86AsmParser()
1077 InstInfo->AsmRewrites->emplace_back(AOK_SizeDirective, Start, in CreateMemForInlineAsm()
1097 InstInfo->AsmRewrites->emplace_back(AOK_SizeDirective, Start, in CreateMemForInlineAsm()
1236 InstInfo->AsmRewrites->emplace_back(AOK_ImmPrefix, Tok.getLoc()); in ParseIntelExpression()
1314 RewriteIntelBracExpression(*InstInfo->AsmRewrites, SM.getSymName(), in ParseIntelBracExpression()
1403 InstInfo->AsmRewrites->emplace_back(AOK_Label, Loc, Identifier.size(), in ParseIntelIdentifier()
1431 InstInfo->AsmRewrites->emplace_back(AOK_ImmPrefix, ImmDispToken.getLoc()); in ParseIntelSegmentOverride()
1600 InstInfo->AsmRewrites->emplace_back(AOK_DotOperator, Loc, Len, Val); in ParseIntelDotOperator()
1624 InstInfo->AsmRewrites->emplace_back(AOK_Skip, OffsetOfLoc, 7); in ParseIntelOffsetOfOperator()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 187 struct InstInfo { struct
193 SmallVector<InstInfo, 4> Insts;
197 InstInfo Info = {I, SPAdjust, BeforeFPSet}; in addInst()
203 [&](InstInfo &Info) { return Info.I == I; }); in addExtraBytes()
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