| /external/llvm/utils/TableGen/ |
| D | CodeGenSchedule.h | 50 bool IsRead; member
59 : Index(0), TheDef(nullptr), IsRead(false), IsAlias(false), in CodeGenSchedRW()
64 IsRead = Def->isSubClassOf("SchedRead"); in CodeGenSchedRW()
77 : Index(Idx), Name(Name), TheDef(nullptr), IsRead(Read), IsAlias(false), in CodeGenSchedRW()
320 const CodeGenSchedRW &getSchedRW(unsigned Idx, bool IsRead) const { in getSchedRW() argument
321 return IsRead ? getSchedRead(Idx) : getSchedWrite(Idx); in getSchedRW()
324 bool IsRead = Def->isSubClassOf("SchedRead"); in getSchedRW() local
325 unsigned Idx = getSchedRWIdx(Def, IsRead); in getSchedRW()
327 IsRead ? getSchedRead(Idx) : getSchedWrite(Idx)); in getSchedRW()
333 unsigned getSchedRWIdx(Record *Def, bool IsRead, unsigned After = 0) const;
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| D | CodeGenSchedule.cpp | 323 std::string CodeGenSchedModels::genRWName(ArrayRef<unsigned> Seq, bool IsRead) { in genRWName() argument
328 Name += getSchedRW(*I, IsRead).Name; in genRWName()
334 unsigned CodeGenSchedModels::getSchedRWIdx(Record *Def, bool IsRead, in getSchedRWIdx() argument
336 const std::vector<CodeGenSchedRW> &RWVec = IsRead ? SchedReads : SchedWrites; in getSchedRWIdx()
387 bool IsRead) const { in findRWs()
389 unsigned Idx = getSchedRWIdx(*RI, IsRead); in findRWs()
396 bool IsRead) const { in expandRWSequence()
397 const CodeGenSchedRW &SchedRW = getSchedRW(RWIdx, IsRead); in expandRWSequence()
407 expandRWSequence(*I, RWSeq, IsRead); in expandRWSequence()
415 unsigned RWIdx, IdxVec &RWSeq, bool IsRead, in expandRWSeqForProc() argument
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| /external/clang/include/clang/Sema/ |
| D | ScopeInfo.h | 276 WeakUseTy(const Expr *Use, bool IsRead) : Rep(Use, IsRead) {} in WeakUseTy() argument
313 inline void recordUseOfWeak(const ExprT *E, bool IsRead = true);
841 void FunctionScopeInfo::recordUseOfWeak(const ExprT *E, bool IsRead) { in recordUseOfWeak() argument
844 Uses.push_back(WeakUseTy(E, IsRead)); in recordUseOfWeak()
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| D | Sema.h | 1184 void recordUseOfEvaluatedWeak(const ExprT *E, bool IsRead=true) {
1186 getCurFunction()->recordUseOfWeak(E, IsRead);
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| /external/llvm/lib/Transforms/IPO/ |
| D | FunctionAttrs.cpp | 415 bool IsRead = false; in determinePointerReadAttrs() local
462 IsRead = true; in determinePointerReadAttrs()
504 IsRead = true; in determinePointerReadAttrs()
512 IsRead = true; in determinePointerReadAttrs()
524 return IsRead ? Attribute::ReadOnly : Attribute::ReadNone; in determinePointerReadAttrs()
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| /external/compiler-rt/lib/tsan/rtl/ |
| D | tsan_rtl.h | 250 bool ALWAYS_INLINE IsWrite() const { return !IsRead(); } in IsWrite()
251 bool ALWAYS_INLINE IsRead() const { return x_ & kReadBit; } in IsRead() function
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| D | tsan_rtl.cc | 658 old.IsRead() <= cur.IsRead()) in ContainsSameAccessSlow()
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| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 3455 llvm::Type *ValueType, bool IsRead) { in EmitSpecialRegisterBuiltin() argument
3477 if (IsRead) { in EmitSpecialRegisterBuiltin()
3764 bool IsRead = BuiltinID == ARM::BI__builtin_arm_rsr || in EmitARMBuiltinExpr() local
3785 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); in EmitARMBuiltinExpr()
4525 bool IsRead = BuiltinID == AArch64::BI__builtin_arm_rsr || in EmitAArch64BuiltinExpr() local
4545 return EmitSpecialRegisterBuiltin(*this, E, RegisterType, ValueType, IsRead); in EmitAArch64BuiltinExpr()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 3459 static int getMClassRegisterMask(StringRef Reg, StringRef Flags, bool IsRead, in getMClassRegisterMask() argument
3473 if (IsRead) { in getMClassRegisterMask()
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