Searched refs:LiveRegs (Results 1 – 10 of 10) sorted by relevance
45 SparseSet<unsigned> LiveRegs; variable51 LivePhysRegs() : TRI(nullptr), LiveRegs() {} in LivePhysRegs()56 LiveRegs.setUniverse(TRI->getNumRegs()); in LivePhysRegs()63 LiveRegs.clear(); in init()64 LiveRegs.setUniverse(TRI->getNumRegs()); in init()68 void clear() { LiveRegs.clear(); } in clear()71 bool empty() const { return LiveRegs.empty(); } in empty()79 LiveRegs.insert(*SubRegs); in addReg()89 LiveRegs.erase(*SubRegs); in removeReg()92 LiveRegs.erase(*SuperRegs); in removeReg()[all …]
166 BitVector LiveRegs; variable
294 LiveRegSet LiveRegs;
142 LiveReg *LiveRegs; member in __anonf2f219e90311::ExeDepsFix269 assert(LiveRegs && "Must enter basic block first."); in setLiveReg()271 if (LiveRegs[rx].Value == dv) in setLiveReg()273 if (LiveRegs[rx].Value) in setLiveReg()274 release(LiveRegs[rx].Value); in setLiveReg()275 LiveRegs[rx].Value = retain(dv); in setLiveReg()281 assert(LiveRegs && "Must enter basic block first."); in kill()282 if (!LiveRegs[rx].Value) in kill()285 release(LiveRegs[rx].Value); in kill()286 LiveRegs[rx].Value = nullptr; in kill()[all …]
31 SparseSet<unsigned>::iterator LRI = LiveRegs.begin(); in removeRegsInMask()32 while (LRI != LiveRegs.end()) { in removeRegsInMask()36 LRI = LiveRegs.erase(LRI); in removeRegsInMask()130 static void addLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB) { in addLiveIns() argument132 LiveRegs.addReg(LI.PhysReg); in addLiveIns()137 static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF, in addPristines() argument144 LiveRegs.addReg(*CSR); in addPristines()146 LiveRegs.removeReg(Info.getReg()); in addPristines()
53 LivePhysRegs LiveRegs; member in __anonfb9f51e30111::StackMapLiveness124 LiveRegs.init(TRI); in calculateLiveness()125 LiveRegs.addLiveOuts(&MBB); in calculateLiveness()136 DEBUG(dbgs() << " " << LiveRegs << " " << *I); in calculateLiveness()137 LiveRegs.stepBackward(*I); in calculateLiveness()159 for (auto Reg : LiveRegs) in createRegisterMask()
193 LiveRegs.clear(); in reset()226 LiveRegs.init(*MRI); in init()265 P.LiveInRegs.reserve(LiveRegs.size()); in closeTop()266 LiveRegs.appendTo(P.LiveInRegs); in closeTop()277 P.LiveOutRegs.reserve(LiveRegs.size()); in closeBottom()278 LiveRegs.appendTo(P.LiveOutRegs); in closeBottom()284 assert(LiveRegs.size() == 0 && "no region boundary"); in closeRegion()486 if (LiveRegs.insert(Reg)) in addLiveRegs()493 assert(!LiveRegs.contains(Reg) && "avoid bumping max pressure twice"); in discoverLiveIn()504 assert(!LiveRegs.contains(Reg) && "avoid bumping max pressure twice"); in discoverLiveOut()[all …]
1161 LiveRegs.reset(); in startBlockForKills()1170 LiveRegs.set(*SubRegs); in startBlockForKills()1224 if (LiveRegs.test(MO.getReg())) { in toggleKillFlag()1238 if (LiveRegs.test(*SubRegs)) { in toggleKillFlag()1255 LiveRegs.resize(TRI->getNumRegs()); in fixupKills()1274 LiveRegs.clearBitsNotInMask(MO.getRegMask()); in fixupKills()1285 LiveRegs.reset(*SubRegs); in fixupKills()1303 if (LiveRegs.test(*SubRegs)) { in fixupKills()1312 kill = !LiveRegs.test(Reg); in fixupKills()1341 LiveRegs.set(*SubRegs); in fixupKills()
49 LivePhysRegs LiveRegs; member in __anon023adb220111::SystemZShortenInst84 if (LiveRegs.contains(OtherReg)) in shortenIIF()140 if (!LiveRegs.contains(SystemZ::CC) && shortenOn001(MI, Opcode)) { in shortenOn001AddCC()179 LiveRegs.clear(); in processBlock()180 LiveRegs.addLiveOuts(&MBB); in processBlock()260 LiveRegs.stepBackward(MI); in processBlock()270 LiveRegs.init(TRI); in runOnMachineFunction()
84 LivePhysRegs LiveRegs; member542 if (!LiveRegs.contains(Reg)) in findFreeReg()554 LiveRegs.init(TRI); in moveLiveRegsBefore()555 LiveRegs.addLiveOuts(&MBB, true); in moveLiveRegsBefore()562 LiveRegs.stepBackward(*LiveRegPos); in moveLiveRegsBefore()645 LiveRegs.addReg(R.first); in CreateLoadStoreMulti()