Home
last modified time | relevance | path

Searched refs:LoadExtType (Results 1 – 25 of 27) sorted by relevance

12

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h817 enum LoadExtType { enum
825 NodeType getExtForLoadExtType(bool IsFP, LoadExtType);
DSelectionDAG.h838 SDValue getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
843 SDValue getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
848 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
855 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
879 MachineMemOperand *MMO, ISD::LoadExtType);
DSelectionDAGNodes.h1960 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
1972 ISD::LoadExtType getExtensionType() const {
1973 return ISD::LoadExtType(SubclassData & 3);
2044 unsigned numOperands, SDVTList VTs, ISD::LoadExtType ETy,
2051 ISD::LoadExtType getExtensionType() const {
2052 return ISD::LoadExtType(SubclassData & 3);
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h133 ISD::LoadExtType ExtType,
DAMDGPUISelLowering.cpp439 ISD::LoadExtType, in shouldReduceLoadWidth() argument
1406 ISD::LoadExtType ExtType = Load->getExtensionType(); in LowerLOAD()
DR600ISelLowering.cpp1684 ISD::LoadExtType Ext = ISD::NON_EXTLOAD; in LowerFormalArguments()
DSIISelLowering.cpp560 ISD::LoadExtType ExtTy = Signed ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in LowerParameter()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp203 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeOp()
500 ISD::LoadExtType ExtType = LD->getExtensionType(); in ExpandLoad()
DLegalizeVectorTypes.cpp992 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_LOAD()
1039 ISD::LoadExtType ExtType = MLD->getExtensionType(); in SplitVecRes_MLOAD()
2721 ISD::LoadExtType ExtType = LD->getExtensionType(); in WidenVecRes_LOAD()
2752 ISD::LoadExtType ExtType = N->getExtensionType(); in WidenVecRes_MLOAD()
3527 ISD::LoadExtType ExtType) { in GenWidenVectorExtLoads()
DLegalizeTypes.h771 LoadSDNode *LD, ISD::LoadExtType ExtType);
DSelectionDAG.cpp230 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) { in getExtForLoadExtType()
5039 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
5072 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
5141 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, in getExtLoad()
5154 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, in getExtLoad()
5327 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) { in getMaskedLoad()
DLegalizeDAG.cpp545 ISD::LoadExtType HiExtType = LD->getExtensionType(); in ExpandUnalignedLoad()
905 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeLoadOps()
984 ISD::LoadExtType NewExtType = in LegalizeLoadOps()
1129 ISD::LoadExtType MidExtType = in LegalizeLoadOps()
DLegalizeIntegerTypes.cpp473 ISD::LoadExtType ExtType = in PromoteIntRes_LOAD()
2004 ISD::LoadExtType ExtType = N->getExtensionType(); in ExpandIntRes_LOAD()
DDAGCombiner.cpp967 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) in PromoteOperand()
1189 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) in PromoteLoad()
5904 ISD::LoadExtType ExtType = in CombineExtLoad()
6617 ISD::LoadExtType ExtType = LN0->getExtensionType(); in visitANY_EXTEND()
6725 ISD::LoadExtType ExtType = ISD::NON_EXTLOAD; in ReduceLoadWidth()
12120 ISD::LoadExtType ExtType = TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, in ReplaceExtractVectorEltOfLoadWithNarrowedLoad()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h691 ISD::LoadExtType ET = ISD::NON_EXTLOAD) const;
/external/llvm/lib/Target/X86/
DX86ISelLowering.h872 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
DX86InstrInfo.td938 ISD::LoadExtType ExtType = LD->getExtensionType();
948 ISD::LoadExtType ExtType = LD->getExtensionType();
956 ISD::LoadExtType ExtType = LD->getExtensionType();
/external/llvm/include/llvm/Target/
DTargetLowering.h819 ISD::LoadExtType ExtTy, in shouldReduceLoadWidth()
/external/llvm/lib/Target/Hexagon/
DHexagonISelDAGToDAG.cpp380 ISD::LoadExtType ExtType = LD->getExtensionType(); in SelectIndexedLoad()
DHexagonISelLowering.cpp1292 ISD::LoadExtType Ext = LoadNode->getExtensionType(); in LowerLOAD()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp2171 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments()
2297 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp2495 ISD::LoadExtType ExtType = ISD::NON_EXTLOAD; in LowerFormalArguments()
9184 bool checkValueWidth(SDValue V, unsigned width, ISD::LoadExtType &ExtType) { in checkValueWidth()
9291 ISD::LoadExtType ExtType, signed AddConstant, in isEquivalentMaskless()
9416 ISD::LoadExtType ExtType; in performCONDCombine()
DAArch64ISelDAGToDAG.cpp1053 ISD::LoadExtType ExtType = LD->getExtensionType(); in SelectIndexedLoad()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2196 ISD::LoadExtType ExtType = LD->getExtensionType(); in lowerLOAD()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp1612 ISD::LoadExtType ExtType = (C.ICmpType == SystemZICMP::SignedOnly ? in adjustSubwordCmp()

12