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Searched refs:MFVSRD (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td1221 def MFVSRD : XX1_RS6_RD5_XO<31, 51, (outs g8rc:$rA), (ins vsfrc:$XT),
1279 (MFVSRD
1283 dag LE_DWORD_1 = (MFVSRD
1328 lined up for the MFVSRD
1356 dag LE_MV_VBYTE = (MFVSRD
1388 dag LE_MV_VHALF = (MFVSRD
1417 dag LE_MV_VWORD = (MFVSRD
1448 (MFVSRD (EXTRACT_SUBREG
1477 dag BE_MV_VBYTE = (MFVSRD
1495 dag BE_MV_VHALF = (MFVSRD
[all …]
/external/v8/src/ppc/
Dconstants-ppc.h187 MFVSRD = 51 << 1, // Move From VSR Doubleword enumerator
Ddisasm-ppc.cc851 case MFVSRD: { in DecodeExt2()
Dassembler-ppc.cc1860 emit(EXT2 | MFVSRD | src.code() * B21 | dst.code() * B16); in mffprd()
Dsimulator-ppc.cc2095 case MFVSRD: { in ExecuteExt2_9bit_part1()