/external/mesa3d/src/mesa/x86/ |
D | 3dnow_normal.S | 88 MOVD ( ARG_SCALE, MM0 ) /* | scale */ 89 PUNPCKLDQ ( MM0, MM0 ) /* scale | scale */ 91 PFMUL ( MM0, MM3 ) /* scale * m1 | scale * m0 */ 92 PFMUL ( MM0, MM4 ) /* scale * m5 | scale * m4 */ 93 PFMUL ( MM0, MM5 ) /* scale * m6 | scale * m2 */ 94 PFMUL ( MM0, MM6 ) /* scale * m9 | scale * m8 */ 95 PFMUL ( MM0, MM7 ) /* | scale * m10 */ 100 MOVQ ( REGIND (EDX), MM0 ) /* x1 | x0 */ 103 MOVQ ( MM0, MM1 ) /* x1 | x0 */ 106 PFMUL ( MM3, MM0 ) /* x1*m1 | x0*m0 */ [all …]
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D | 3dnow_xform4.S | 69 MOVQ ( REGIND(EAX), MM0 ) /* x1 | x0 */ 75 MOVQ ( MM0, MM2 ) /* x1 | x0 */ 78 PUNPCKLDQ ( MM0, MM0 ) /* x0 | x0 */ 81 MOVQ ( MM0, MM1 ) /* x0 | x0 */ 84 PFMUL ( REGIND(ECX), MM0 ) /* x0*m1 | x0*m0 */ 100 PFADD ( MM0, MM2 ) 158 MOVD ( REGIND(ECX), MM0 ) /* | m00 */ 159 PUNPCKLDQ ( REGOFF(20, ECX), MM0 ) /* m11 | m00 */ 180 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */ 250 MOVQ ( MM2, MM0 ) /* x1 | x0 */ [all …]
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D | 3dnow_xform3.S | 69 MOVQ ( REGIND(EAX), MM0 ) /* x1 | x0 */ 75 MOVQ ( MM0, MM1 ) /* x1 | x0 */ 78 PUNPCKLDQ ( MM0, MM0 ) /* x0 | x0 */ 84 MOVQ ( MM0, MM3 ) /* x0 | x0 */ 88 PFMUL ( REGIND(ECX), MM0 ) /* x0*m1 | x0*m0 */ 94 PFADD ( MM0, MM1 ) /* x0*m1+x1*m5 | x0*m0+x1*m4 */ 150 MOVD ( REGIND(ECX), MM0 ) /* | m00 */ 151 PUNPCKLDQ ( REGOFF(20, ECX), MM0 ) /* m11 | m00 */ 172 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */ 240 MOVQ ( REGIND(EAX), MM0 ) /* x1 | x0 */ [all …]
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D | 3dnow_xform2.S | 62 MOVD ( REGIND(ECX), MM0 ) /* | m00 */ 63 PUNPCKLDQ ( REGOFF(16, ECX), MM0 ) /* m10 | m00 */ 83 PFMUL ( MM0, MM6 ) /* x1*m10 | x0*m00 */ 143 MOVD ( REGIND(ECX), MM0 ) /* | m00 */ 144 PUNPCKLDQ ( REGOFF(20, ECX), MM0 ) /* m11 | m00 */ 152 PFMUL ( MM0, MM4 ) /* x1*m11 | x0*m00 */ 199 MOVD ( REGIND(ECX), MM0 ) /* | m00 */ 200 PUNPCKLDQ ( REGOFF(16, ECX), MM0 ) /* m10 | m00 */ 217 PFMUL ( MM0, MM6 ) /* x1*m10 | x0*m00 */ 276 MOVD ( REGIND(ECX), MM0 ) /* | m00 */ [all …]
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D | 3dnow_xform1.S | 62 MOVQ ( REGIND(ECX), MM0 ) /* m01 | m00 */ 75 PFMUL ( MM0, MM4 ) /* x0*m01 | x0*m00 */ 130 MOVD ( REGIND(EAX), MM0 ) /* | x0 */ 133 MOVD ( MM0, REGIND(EDX) ) /* | r0 */ 175 MOVD ( REGIND(ECX), MM0 ) /* | m00 */ 184 PFMUL ( MM0, MM4 ) /* | x0*m00 */ 233 MOVD ( REGIND(ECX), MM0 ) /* | m00 */ 240 PFMUL ( MM0, MM4 ) /* 0 | x0*m00 */ 287 MOVQ ( REGIND(ECX), MM0 ) /* m01 | m00 */ 296 PFMUL ( MM0, MM4 ) /* x0*m01 | x0*m00 */ [all …]
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D | mmx_blend.S | 271 PXOR ( MM0, MM0 ) /* 0x0000 | 0x0000 | 0x0000 | 0x0000 */ 275 GMB_UNPACK( MM1, MM2, MM4, MM5, MM0 ) ;\ 383 PXOR ( MM0, MM0 ) /* 0x0000 | 0x0000 | 0x0000 | 0x0000 */ ;\ 391 GMB_UNPACK( MM1, MM2, MM4, MM5, MM0 ) ;\
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D | assyntax.h | 215 #define MM0 %mm0 macro
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/external/llvm/test/CodeGen/X86/ |
D | 2007-07-03-GR64ToVR64.ll | 3 ; CHECK: movd %rsi, [[MM0:%mm[0-9]+]] 5 ; CHECK: paddusw [[MM0]], [[MM1]]
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/external/libvpx/libvpx/vpx_dsp/x86/ |
D | variance_impl_mmx.asm | 105 psubsw mm0, mm1 ; A-B (low order) to MM0 128 psubsw mm0, mm1 ; A-B (low order) to MM0 151 psubsw mm0, mm1 ; A-B (low order) to MM0 174 psubsw mm0, mm1 ; A-B (low order) to MM0 197 psubsw mm0, mm1 ; A-B (low order) to MM0 221 psubsw mm0, mm1 ; A-B (low order) to MM0 244 psubsw mm0, mm1 ; A-B (low order) to MM0 267 psubsw mm0, mm1 ; A-B (low order) to MM0 343 psubsw mm0, mm1 ; A-B (low order) to MM0 355 psubsw mm0, mm1 ; A-B (low order) to MM0 [all …]
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/external/ImageMagick/PerlMagick/t/reference/write/composite/ |
D | CopyBlue.miff | 41 …�MM?�MM=�MM<�MM<�MM1�MM/�MM,�MM.�MM/�MM0�MM3�MM4�MM1�MM-�MM-�MM-�MM.�MM0�MM-�MM'�MM�MM4�MMN�MM3�M…
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/external/llvm/lib/Target/X86/ |
D | X86CallingConv.td | 71 // MMX vector types are always returned in MM0. If the target doesn't have 72 // MM0, it doesn't support these vector types. 73 CCIfType<[x86mmx], CCAssignToReg<[MM0]>>, 547 CCAssignToReg<[MM0, MM1, MM2]>>>,
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D | X86RegisterInfo.td | 152 def MM0 : X86Reg<"mm0", 0>, DwarfRegNum<[41, 29, 29]>;
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D | X86InstrCompiler.td | 448 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, 468 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
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/external/llvm/lib/Target/X86/Disassembler/ |
D | X86DisassemblerDecoder.h | 207 ENTRY(MM0) \
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/external/llvm/docs/TableGen/ |
D | index.rst | 65 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
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D | LangIntro.rst | 543 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
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/external/llvm/lib/Target/X86/InstPrinter/ |
D | X86InstComments.cpp | 31 if (X86::MM0 <= RegNo && RegNo <= X86::MM7) in getVectorRegSize()
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/external/ImageMagick/PerlMagick/t/reference/write/wmf/ |
D | clock.miff | 60 …������������&&����������������������݉�������������""���������������������MM0��������������������… 107 …�����������������������������������������w���������������������������������MM0��������������������…
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/external/llvm/docs/ |
D | CodeGenerator.rst | 1221 ``EAX`` is denoted by 43, and the MMX register ``MM0`` is mapped to 65.
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