Searched refs:Mask1 (Results 1 – 8 of 8) sorted by relevance
| /external/llvm/unittests/ADT/ |
| D | BitVectorTest.cpp | 235 const uint32_t Mask1[] = { 0x80000000, 6, 5 }; in TYPED_TEST() local
238 A.setBitsInMask(Mask1, 1); in TYPED_TEST()
243 A.setBitsInMask(Mask1, 1); in TYPED_TEST()
249 A.setBitsInMask(Mask1, 1); in TYPED_TEST()
251 A.setBitsInMask(Mask1, 2); in TYPED_TEST()
255 A.setBitsInMask(Mask1, 2); in TYPED_TEST()
259 A.setBitsInMask(Mask1, 3); in TYPED_TEST()
262 A.setBitsNotInMask(Mask1, 1); in TYPED_TEST()
265 A.setBitsNotInMask(Mask1, 3); in TYPED_TEST()
273 A.setBitsNotInMask(Mask1, 3); in TYPED_TEST()
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| /external/vulkan-validation-layers/libs/glm/detail/ |
| D | intrinsic_integer.inl | 37 __m128i const Mask1 = _mm_set1_epi32(0x33333333); local
70 Reg1 = _mm_and_si128(Reg1, Mask1);
91 __m128i const Mask1 = _mm_set1_epi32(0x33333333); local
123 Reg1 = _mm_and_si128(Reg1, Mask1);
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| /external/llvm/test/tools/llvm-readobj/ |
| D | mips-reginfo.test | 7 CHECK-NEXT: Co-Proc Mask1: 0x0
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| /external/llvm/lib/Transforms/Vectorize/ |
| D | BBVectorize.cpp | 2836 std::vector<Constant *> Mask1(numElemI), Mask2(numElemI); in replaceOutputsOfPair() local
2838 Mask1[v] = ConstantInt::get(Type::getInt32Ty(Context), v); in replaceOutputsOfPair()
2843 ConstantVector::get(Mask1), in replaceOutputsOfPair()
2851 std::vector<Constant *> Mask1(numElemJ), Mask2(numElemJ); in replaceOutputsOfPair() local
2853 Mask1[v] = ConstantInt::get(Type::getInt32Ty(Context), v); in replaceOutputsOfPair()
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| /external/llvm/test/CodeGen/X86/ |
| D | masked_gather_scatter.ll | 65 ; SCALAR-NEXT: %Mask1 = extractelement <16 x i1> %imask, i32 1
66 ; SCALAR-NEXT: %ToLoad1 = icmp eq i1 %Mask1, true
190 ; SCALAR-NEXT: %Mask1 = extractelement <16 x i1> %imask, i32 1
191 ; SCALAR-NEXT: %ToStore1 = icmp eq i1 %Mask1, true
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 3721 SmallVector<int,4> Mask1; in visitOR() local
3730 Mask1.push_back(M0); in visitOR()
3742 Mask1.push_back(M0 < (int)NumElts ? M0 : M1 + NumElts); in visitOR()
3748 if (TLI.isShuffleMaskLegal(Mask1, VT)) in visitOR()
3750 N1->getOperand(0), &Mask1[0]); in visitOR()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4042 SDValue Mask1 = DAG.getConstant(0x80000000, dl, MVT::i32); in LowerFCOPYSIGN() local
4044 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 13594 SDValue Mask1 = in LowerFCOPYSIGN() local
13600 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, LogicVT, Op1, Mask1); in LowerFCOPYSIGN()
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