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Searched refs:OPT (Results 1 – 25 of 81) sorted by relevance

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/external/llvm/test/CodeGen/WebAssembly/
Dcfg-stackify.ll2 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck -check-prefix=OPT %s
23 ; OPT-LABEL: test0:
24 ; OPT: loop
25 ; OPT-NOT: br
26 ; OPT: i32.add
27 ; OPT-NEXT: i32.ge_s
28 ; OPT-NEXT: br_if
29 ; OPT-NOT: br
30 ; OPT: call
31 ; OPT: br BB0_1{{$}}
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/external/llvm/test/Feature/
Doptnone-opt.ll1 ; RUN: opt -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O0
2 ; RUN: opt -O1 -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O1
3 ; RUN: opt -O2 -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O1 --check-prefix=OPT-O2O3
4 ; RUN: opt -O3 -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-O1 --check-prefix=OPT-O2O3
5 ; RUN: opt -bb-vectorize -dce -die -loweratomic -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT…
6 …l -loop-rotate -loop-unroll -loop-unswitch -S -debug %s 2>&1 | FileCheck %s --check-prefix=OPT-LOOP
37 ; OPT-O0-NOT: Skipping pass
40 ; OPT-O1-DAG: Skipping pass 'Aggressive Dead Code Elimination'
41 ; OPT-O1-DAG: Skipping pass 'Combine redundant instructions'
42 ; OPT-O1-DAG: Skipping pass 'Dead Store Elimination'
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/external/clang/test/CodeGenOpenCL/
Dshifts.cl1 … %clang_cc1 -x cl -O1 -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s -check-prefix=OPT
8 // OPT: @gtest1 = constant i64 2147483648
22 //OPT: @positiveShift32
24 //OPT: [[M32:%.+]] = and i32 %b, 31
25 //OPT-NEXT: [[C32:%.+]] = shl i32 %a, [[M32]]
28 //OPT-NEXT: [[E32:%.+]] = add nsw i32 [[C32]], 2
30 //OPT-NEXT: ret i32 [[E32]]
34 //OPT: @positiveShift64
36 //OPT: [[M64:%.+]] = and i64 %b, 63
37 //OPT-NEXT: [[C64:%.+]] = ashr i64 %a, [[M64]]
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/external/llvm/test/CodeGen/AMDGPU/
Dcgp-addressing-modes-flat.ll1 …ple=amdgcn-unknown-unknown -mcpu=bonaire < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-CI %s
2 …riple=amdgcn-unknown-unknown -mcpu=tonga < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-VI %s
6 ; OPT-LABEL: @test_no_sink_flat_small_offset_i32(
7 ; OPT: getelementptr i32, i32 addrspace(4)* %in
8 ; OPT: br i1
9 ; OPT-NOT: ptrtoint
34 ; OPT-LABEL: @test_sink_noop_addrspacecast_flat_to_global_i32(
35 ; OPT: getelementptr i32, i32 addrspace(4)* %out,
36 ; OPT-CI-NOT: getelementptr
37 ; OPT: br i1
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Dcgp-addressing-modes.ll1 …iple=amdgcn-unknown-unknown -mcpu=tahiti < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-SI %s
2 …ple=amdgcn-unknown-unknown -mcpu=bonaire < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-CI %s
3 …riple=amdgcn-unknown-unknown -mcpu=tonga < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-VI %s
10 ; OPT-LABEL: @test_sink_global_small_offset_i32(
11 ; OPT-CI-NOT: getelementptr i32, i32 addrspace(1)* %in
12 ; OPT-VI: getelementptr i32, i32 addrspace(1)* %in
13 ; OPT: br i1
14 ; OPT-CI: ptrtoint
38 ; OPT-LABEL: @test_sink_global_small_max_i32_ds_offset(
39 ; OPT: %in.gep = getelementptr i8, i8 addrspace(1)* %in, i64 65535
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Dcodegen-prepare-addrmode-sext.ll1 ; RUN: opt -mtriple=amdgcn-- -codegenprepare -S < %s | FileCheck -check-prefix=OPT %s
4 ; OPT-LABEL: @test(
5 ; OPT: mul nsw i32
6 ; OPT-NEXT: sext
/external/opencv3/cmake/
DOpenCVCRTLinkage.cmake13 # "LNK4075: ignoring '/INCREMENTAL' due to '/OPT:ICF' specification"
14 # "LNK4075: ignoring '/INCREMENTAL' due to '/OPT:REF' specification"
17 …string(REPLACE "/OPT:ICF " "/OPT:NOICF " CMAKE_EXE_LINKER_FLAGS_DEBUG "${CMAKE_EXE_LINKER_FLAGS_DE…
18 …string(REPLACE "/OPT:REF " "/OPT:NOREF " CMAKE_EXE_LINKER_FLAGS_DEBUG "${CMAKE_EXE_LINKER_FLAGS_DE…
22 …string(REPLACE "/OPT:ICF " "/OPT:NOICF " CMAKE_MODULE_LINKER_FLAGS_DEBUG "${CMAKE_MODULE_LINKER_FL…
23 …string(REPLACE "/OPT:REF " "/OPT:NORE F" CMAKE_MODULE_LINKER_FLAGS_DEBUG "${CMAKE_MODULE_LINKER_FL…
27 …string(REPLACE "/OPT:ICF " "/OPT:NOICF " CMAKE_SHARED_LINKER_FLAGS_DEBUG "${CMAKE_SHARED_LINKER_FL…
28 …string(REPLACE "/OPT:REF " "/OPT:NOREF " CMAKE_SHARED_LINKER_FLAGS_DEBUG "${CMAKE_SHARED_LINKER_FL…
33 …ULE_LINKER_FLAGS_DEBUG "${CMAKE_MODULE_LINKER_FLAGS_DEBUG} /INCREMENTAL:NO /OPT:NOREF /OPT:NOICF")
34 …EXE_LINKER_FLAGS_DEBUG "${CMAKE_EXE_LINKER_FLAGS_DEBUG} /INCREMENTAL:NO /OPT:NOREF /OPT:NOICF")
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/external/llvm/test/CodeGen/NVPTX/
Dmulwide.ll1 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 -O3 | FileCheck %s --check-prefix=OPT
4 ; OPT-LABEL: @mulwide16
7 ; OPT: mul.wide.s16
15 ; OPT-LABEL: @mulwideu16
18 ; OPT: mul.wide.u16
26 ; OPT-LABEL: @mulwide8
29 ; OPT: mul.wide.s16
37 ; OPT-LABEL: @mulwideu8
40 ; OPT: mul.wide.u16
48 ; OPT-LABEL: @mulwide32
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/external/llvm/test/Other/
Dconstant-fold-gep.ll5 ; "OPT" - Optimizations but no targetdata. This tests default target layout
7 ; RUN: opt -S -o - -instcombine -globalopt < %s | FileCheck --check-prefix=OPT %s
27 ; OPT: @G8 = global i8* null
28 ; OPT: @G1 = global i1* null
29 ; OPT: @F8 = global i8* inttoptr (i64 -1 to i8*)
30 ; OPT: @F1 = global i1* inttoptr (i64 -1 to i1*)
31 ; OPT: @H8 = global i8* inttoptr (i64 -1 to i8*)
32 ; OPT: @H1 = global i1* inttoptr (i64 -1 to i1*)
60 ; OPT: @a = constant i64 18480
61 ; OPT: @b = constant i64 8
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/external/llvm/test/CodeGen/SPARC/
D64bit.ll2 ; RUN: llc < %s -march=sparcv9 -mattr=+popc | FileCheck %s -check-prefix=OPT
7 ; OPT-LABEL: ret2:
8 ; OPT: retl
9 ; OPT: mov %o1, %o0
17 ; OPT-LABEL: shl_imm:
18 ; OPT: retl
19 ; OPT: sllx %o0, 7, %o0
28 ; OPT-LABEL: sra_reg:
29 ; OPT: retl
30 ; OPT: srax %o0, %o1, %o0
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/external/llvm/test/CodeGen/SystemZ/
Dfp-sincos-01.ll4 …N: llc < %s -mtriple=s390x-linux-gnu -enable-unsafe-fp-math | FileCheck %s --check-prefix=CHECK-OPT
7 ; CHECK-OPT-LABEL: f1:
8 ; CHECK-OPT: brasl %r14, sincosf@PLT
9 ; CHECK-OPT: le %f0, 164(%r15)
10 ; CHECK-OPT: aeb %f0, 160(%r15)
22 ; CHECK-OPT-LABEL: f2:
23 ; CHECK-OPT: brasl %r14, sincos@PLT
24 ; CHECK-OPT: ld %f0, 168(%r15)
25 ; CHECK-OPT: adb %f0, 160(%r15)
37 ; CHECK-OPT-LABEL: f3:
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/external/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/
Ddifferent-addrspace-addressing-mode-loops.ll1 ; RUN: opt -S -mtriple=amdgcn-- -mcpu=bonaire -loop-reduce < %s | FileCheck -check-prefix=OPT %s
8 ; OPT-LABEL: @test_global_addressing_loop_uniform_index_max_offset_i32(
9 ; OPT: {{^}}.lr.ph:
10 ; OPT: %lsr.iv2 = phi i8 addrspace(1)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
11 ; OPT: %scevgep4 = getelementptr i8, i8 addrspace(1)* %lsr.iv2, i64 4095
12 ; OPT: load i8, i8 addrspace(1)* %scevgep4, align 1
43 ; OPT-LABEL: @test_global_addressing_loop_uniform_index_max_offset_p1_i32(
44 ; OPT: {{^}}.lr.ph.preheader:
45 ; OPT: %scevgep2 = getelementptr i8, i8 addrspace(1)* %arg1, i64 4096
46 ; OPT: br label %.lr.ph
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/external/llvm/test/Analysis/TypeBasedAliasAnalysis/
Dtbaa-path.ll2 ; RUN: opt < %s -tbaa -basicaa -gvn -S | FileCheck %s --check-prefix=OPT
17 ; OPT: define
18 ; OPT: store i32 1
19 ; OPT: store i32 4
20 ; OPT: %[[RET:.*]] = load i32, i32*
21 ; OPT: ret i32 %[[RET]]
43 ; OPT: define
44 ; OPT: store i32 1
45 ; OPT: store i16 4
47 ; OPT: ret i32 1
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/external/clang/test/Sema/
Dbuiltins.c166 #define OPT(...) (__builtin_constant_p(__VA_ARGS__) && strlen(__VA_ARGS__) < 4) in test17() macro
169 ASSERT(OPT("abc")); in test17()
170 ASSERT(!OPT("abcd")); in test17()
173 ASSERT(!OPT(test17_c)); // expected-warning {{folded}} in test17()
174 ASSERT(!OPT(&test17_c[0])); // expected-warning {{folded}} in test17()
175 ASSERT(!OPT((char*)test17_c)); // expected-warning {{folded}} in test17()
176 ASSERT(!OPT(test17_d)); // expected-warning {{folded}} in test17()
177 ASSERT(!OPT(&test17_d[0])); // expected-warning {{folded}} in test17()
178 ASSERT(!OPT((char*)test17_d)); // expected-warning {{folded}} in test17()
180 #undef OPT in test17()
/external/llvm/test/CodeGen/ARM/
Dthumb2-size-opt.ll2 … -mtriple=thumbv7-linux-gnueabihf -o - -show-mc-encoding %s | FileCheck %s --check-prefix=CHECK-OPT
7 ; CHECK-OPT: ands r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
16 ; CHECK-OPT: asrs r{{[0-7]}}, r{{[0-7]}}, #13 @ encoding: [{{0x..,0x..}}]
25 ; CHECK-OPT: asrs r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
34 ; CHECK-OPT: bics r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
44 ; CHECK-OPT: eors r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
53 ; CHECK-OPT: lsls r{{[0-7]}}, r{{[0-7]}}, #13 @ encoding: [{{0x..,0x..}}]
62 ; CHECK-OPT: lsls r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
71 ; CHECK-OPT: lsrs r{{[0-7]}}, r{{[0-7]}}, #13 @ encoding: [{{0x..,0x..}}]
80 ; CHECK-OPT: lsrs r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
Dadv-copy-opt.ll2 …ios -mcpu=swift < %s -disable-adv-copy-opt=false | FileCheck -check-prefix=OPT --check-prefix=CHEC…
4 …ios -mcpu=swift < %s -disable-adv-copy-opt=false | FileCheck -check-prefix=OPT --check-prefix=CHEC…
30 ; OPT-NOT: vmov
31 ; OPT: udiv r1, r1, r3
32 ; OPT-NEXT: udiv r0, r0, r2
33 ; OPT-NEXT: bx lr
/external/autotest/client/deps/fakegudev/src/
DMakefile14 OPT := -O2 macro
20 $(CC) -o $@ $(WARN) $(OPT) $(DEBUG) $(PKG_CFLAGS_FAKEGUDEV) \
24 $(CC) -fPIC -shared -o $@ $(WARN) $(OPT) $(DEBUG) \
28 $(CC) -o $@ $(WARN) $(OPT) $(DEBUG) $(PKG_CFLAGS_FAKESYSCALLS) \
32 $(CC) -fPIC -shared -o $@ $(WARN) $(OPT) $(DEBUG) \
/external/clang/test/CodeGenObjCXX/
Darc-new-delete.mm2 …0.0 -emit-llvm -o - %s -O -disable-llvm-optzns | FileCheck %s -check-prefix=CHECK -check-prefix=OPT
12 // OPT-NEXT: [[T0:%.*]] = call i8* @objc_retain(i8* [[INVALUE:%.*]])
13 // OPT-NEXT: store i8* [[T0]], i8** [[INVALUEADDR]]
22 // OPT-NEXT: call i8* @objc_initWeak(i8** {{.*}}, i8* null)
32 // OPT-NEXT: call i8* @objc_initWeak(i8** {{.*}}, i8* null)
45 // OPT: call void @objc_release
67 // OPT: load i8*, i8**
68 // OPT-NEXT: call void @objc_release
88 // OPT-NEXT: [[T0:%.*]] = load i8*, i8** [[CUR]]
89 // OPT-NEXT: objc_release(i8* [[T0]])
/external/llvm/test/MC/X86/AlignedBundling/
Dmisaligned-bundle.s3 # RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-OPT %s
16 # CHECK-OPT: 10: movl $1, (%esp)
20 # CHECK-OPT: 1e: nop
27 # CHECK-OPT: 3f: nop
28 # CHECK-OPT: 40: movl $3, (%esp)
/external/llvm/test/CodeGen/X86/
Ddllimport-x86_64.ll7 ; RUN: opt -mtriple x86_64-pc-win32 -O3 -S < %s | FileCheck %s -check-prefix=OPT
36 ; OPT-NOT: call void @inline1()
37 ; OPT-NOT: call void @inline2()
38 ; OPT-NOT: load i32, i32* @Var2
39 ; OPT: call void (...) @dummy(i32 %1, i32 1)
Ddllimport.ll7 ; RUN: opt -mtriple i386-pc-win32 -O3 -S < %s | FileCheck %s -check-prefix=OPT
47 ; OPT-NOT: call void @inline1()
48 ; OPT-NOT: call void @inline2()
49 ; OPT-NOT: load i32, i32* @Var2
50 ; OPT: call void (...) @dummy(i32 %1, i32 1)
Dstatepoint-forward.ll1 ; RUN: opt -O3 -S < %s | FileCheck --check-prefix=CHECK-OPT %s
34 ; CHECK-OPT-LABEL: test_load_forward
35 ; CHECK-OPT: ret i1 %cmp2
53 ; CHECK-OPT-LABEL: test_store_forward
54 ; CHECK-OPT: ret i1 %cmp2
80 ; CHECK-OPT-LABEL: test_load_forward_nongc_heap
81 ; CHECK-OPT: ret i1 %cmp2
98 ; CHECK-OPT-LABEL: test_store_forward_nongc_heap
99 ; CHECK-OPT: ret i1 %cmp2
Dcodegen-prepare-extload.ll3 …x86_64-apple-macosx -S | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=NONS…
4 …s-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=STRE…
36 ; OPT-NEXT: [[ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i32
37 ; OPT-NEXT: [[RES:%[a-zA-Z_0-9-]+]] = add nuw i32 [[ZEXT]], 2
62 ; OPT-NEXT: [[SEXT:%[a-zA-Z_0-9-]+]] = sext i8 [[LD]] to i32
63 ; OPT-NEXT: [[RES:%[a-zA-Z_0-9-]+]] = add nsw i32 [[SEXT]], 2
288 ; OPT-NEXT: [[ZEXTLD1_1:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i64
289 ; OPT-NEXT: [[ZEXTLD1_2:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i64
290 ; OPT-NEXT: [[ZEXTLD1_3:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i64
291 ; OPT-NEXT: [[LD2:%[a-zA-Z_0-9-]+]] = load i32, i32* %addr2
[all …]
/external/llvm/test/tools/gold/X86/
Demit-llvm.ll14 ; RUN: llvm-dis %t3.o.opt.bc -o - | FileCheck --check-prefix=OPT %s
40 ; OPT-DAG: define hidden void @f2()
48 ; OPT-DAG: define void @f3()
61 ; OPT-DAG: define linkonce_odr void @f5()
68 ; OPT-DAG: define internal void @f6() unnamed_addr
/external/llvm/test/CodeGen/AArch64/
Darm64-codegen-prepare-extload.ll1 …e=aarch64-apple-ios -S | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=NONS…
2 …s-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=STRE…
30 ; OPT-NEXT: [[ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i32
31 ; OPT-NEXT: [[RES:%[a-zA-Z_0-9-]+]] = add nuw i32 [[ZEXT]], 2
56 ; OPT-NEXT: [[SEXT:%[a-zA-Z_0-9-]+]] = sext i8 [[LD]] to i32
57 ; OPT-NEXT: [[RES:%[a-zA-Z_0-9-]+]] = add nsw i32 [[SEXT]], 2
282 ; OPT-NEXT: [[ZEXTLD1_1:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i64
283 ; OPT-NEXT: [[ZEXTLD1_2:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i64
284 ; OPT-NEXT: [[ZEXTLD1_3:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i64
285 ; OPT-NEXT: [[LD2:%[a-zA-Z_0-9-]+]] = load i32, i32* %addr2
[all …]

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