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Searched refs:PIdx (Results 1 – 14 of 14) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DTargetSchedule.h106 const MCProcResourceDesc *getProcResource(unsigned PIdx) const { in getProcResource() argument
107 return SchedModel.getProcResource(PIdx); in getProcResource()
111 const char *getResourceName(unsigned PIdx) const { in getResourceName() argument
112 if (!PIdx) in getResourceName()
114 return SchedModel.getProcResource(PIdx)->Name; in getResourceName()
153 int getResourceBufferSize(unsigned PIdx) const { in getResourceBufferSize() argument
154 return SchedModel.getProcResource(PIdx)->BufferSize; in getResourceBufferSize()
DMachineScheduler.h713 unsigned getNextResourceCycle(unsigned PIdx, unsigned Cycles);
729 void incExecutedResources(unsigned PIdx, unsigned Count);
731 unsigned countResource(unsigned PIdx, unsigned Cycles, unsigned ReadyCycle);
/external/llvm/lib/CodeGen/
DMachineScheduler.cpp1705 unsigned PIdx = PI->ProcResourceIdx; in init() local
1706 unsigned Factor = SchedModel->getResourceFactor(PIdx); in init()
1707 RemainingCounts[PIdx] += (Factor * PI->Cycles); in init()
1744 getNextResourceCycle(unsigned PIdx, unsigned Cycles) { in getNextResourceCycle() argument
1745 unsigned NextUnreserved = ReservedCycles[PIdx]; in getNextResourceCycle()
1832 for (unsigned PIdx = 1, PEnd = SchedModel->getNumProcResourceKinds(); in getOtherResourceCount() local
1833 PIdx != PEnd; ++PIdx) { in getOtherResourceCount()
1834 unsigned OtherCount = getResourceCount(PIdx) + Rem->RemainingCounts[PIdx]; in getOtherResourceCount()
1837 OtherCritIdx = PIdx; in getOtherResourceCount()
1927 void SchedBoundary::incExecutedResources(unsigned PIdx, unsigned Count) { in incExecutedResources() argument
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/external/llvm/utils/TableGen/
DCodeGenSchedule.cpp854 for (unsigned PIdx = 0, PEnd = ProcModels.size(); PIdx != PEnd; ++PIdx) { in inferFromItinClass() local
855 const CodeGenProcModel &PM = ProcModels[PIdx]; in inferFromItinClass()
870 IdxVec ProcIndices(1, PIdx); in inferFromItinClass()
893 unsigned PIdx = getProcModel(Rec->getValueAsDef("SchedModel")).Index; in inferFromInstRWs() local
894 IdxVec ProcIndices(1, PIdx); in inferFromInstRWs()
1527 for (unsigned PIdx = 0, PEnd = ProcModels.size(); PIdx != PEnd; ++PIdx) { in collectItinProcResources() local
1528 const CodeGenProcModel &PM = ProcModels[PIdx]; in collectItinProcResources()
1543 IdxVec ProcIndices(1, PIdx); in collectItinProcResources()
1665 void CodeGenSchedModels::addWriteRes(Record *ProcWriteResDef, unsigned PIdx) { in addWriteRes() argument
1666 assert(PIdx && "don't add resources to an invalid Processor model"); in addWriteRes()
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DCodeGenSchedule.h422 void addWriteRes(Record *ProcWriteResDef, unsigned PIdx);
424 void addReadAdvance(Record *ProcReadAdvanceDef, unsigned PIdx);
DFixedLenDecoderEmitter.cpp1229 unsigned PIdx = getPredicateIndex(TableInfo, PS.str()); in emitPredicateTableEntry() local
1232 encodeULEB128(PIdx, S); in emitPredicateTableEntry()
/external/llvm/lib/Target/ARM/
DARMBaseRegisterInfo.cpp733 int PIdx = MI.findFirstPredOperandIdx(); in eliminateFrameIndex() local
734 ARMCC::CondCodes Pred = (PIdx == -1) in eliminateFrameIndex()
735 ? ARMCC::AL : (ARMCC::CondCodes)MI.getOperand(PIdx).getImm(); in eliminateFrameIndex()
736 unsigned PredReg = (PIdx == -1) ? 0 : MI.getOperand(PIdx+1).getReg(); in eliminateFrameIndex()
DARMBaseInstrInfo.h141 int PIdx = MI->findFirstPredOperandIdx(); in getPredicate() local
142 return PIdx != -1 ? (ARMCC::CondCodes)MI->getOperand(PIdx).getImm() in getPredicate()
DThumbRegisterInfo.cpp566 int PIdx = MI.findFirstPredOperandIdx(); in eliminateFrameIndex() local
567 if (PIdx != -1) in eliminateFrameIndex()
568 removeOperands(MI, PIdx); in eliminateFrameIndex()
DARMBaseInstrInfo.cpp446 int PIdx = I->findFirstPredOperandIdx(); in isPredicated() local
447 if (PIdx != -1 && I->getOperand(PIdx).getImm() != ARMCC::AL) in isPredicated()
453 int PIdx = MI->findFirstPredOperandIdx(); in isPredicated() local
454 return PIdx != -1 && MI->getOperand(PIdx).getImm() != ARMCC::AL; in isPredicated()
468 int PIdx = MI->findFirstPredOperandIdx(); in PredicateInstruction() local
469 if (PIdx != -1) { in PredicateInstruction()
470 MachineOperand &PMO = MI->getOperand(PIdx); in PredicateInstruction()
472 MI->getOperand(PIdx+1).setReg(Pred[1].getReg()); in PredicateInstruction()
1778 int PIdx = MI->findFirstPredOperandIdx(); in getInstrPredicate() local
1779 if (PIdx == -1) { in getInstrPredicate()
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DARMFrameLowering.cpp1755 int PIdx = Old->findFirstPredOperandIdx(); in eliminateCallFramePseudoInstr() local
1756 ARMCC::CondCodes Pred = (PIdx == -1) in eliminateCallFramePseudoInstr()
1757 ? ARMCC::AL : (ARMCC::CondCodes)Old->getOperand(PIdx).getImm(); in eliminateCallFramePseudoInstr()
/external/mesa3d/src/gallium/drivers/radeon/
DR600InstrInfo.cpp458 int PIdx = MI->findFirstPredOperandIdx(); in PredicateInstruction() local
460 if (PIdx != -1) { in PredicateInstruction()
461 MachineOperand &PMO = MI->getOperand(PIdx); in PredicateInstruction()
/external/clang/lib/Analysis/
DThreadSafetyCommon.cpp688 for (unsigned PIdx = 0; PIdx < ArgIndex; ++PIdx) in makePhiNodeVar() local
689 Ph->values()[PIdx] = CurrE; in makePhiNodeVar()
/external/llvm/lib/Target/AMDGPU/
DR600InstrInfo.cpp1006 int PIdx = MI->findFirstPredOperandIdx(); in PredicateInstruction() local
1027 if (PIdx != -1) { in PredicateInstruction()
1028 MachineOperand &PMO = MI->getOperand(PIdx); in PredicateInstruction()