| /external/boringssl/src/crypto/poly1305/ |
| D | poly1305_vec.c | 67 } R20, R21, R22, R23, R24, S21, S22, S23, S24; member
167 p->R22.d[1] = (uint32_t)(r2); in CRYPTO_poly1305_init()
168 p->R22.d[3] = (uint32_t)(r2 >> 32); in CRYPTO_poly1305_init()
206 r2 = ((uint64_t)p->R22.d[3] << 32) | (uint64_t)p->R22.d[1]; in poly1305_first_block()
239 p->R22.v = in poly1305_first_block()
248 p->S22.v = _mm_mul_epu32(p->R22.v, FIVE); in poly1305_first_block()
260 p->R22.d[1] = (uint32_t)(r2); in poly1305_first_block()
261 p->R22.d[3] = (uint32_t)(r2 >> 32); in poly1305_first_block()
303 T2 = _mm_mul_epu32(H0, p->R22.v); in poly1305_blocks()
323 T6 = _mm_mul_epu32(H1, p->R22.v); in poly1305_blocks()
[all …]
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| /external/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.td | 67 def R22 : AVRReg<22, "r22">, DwarfRegNum<[22]>;
95 def R23R22 : AVRReg<22, "r23:r22", [R22, R23]>, DwarfRegNum<[22]>;
119 add R24, R25, R18, R19, R20, R21, R22, R23,
137 add R24, R25, R18, R19, R20, R21, R22, R23,
147 add R23, R22, R21, R20, R19, R18, R17, R16
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| D | AVRCallingConv.td | 21 // i16 are returned in R25:R24, R23:R22, R21:R20 and R19:R18.
56 CCIfType<[i8], CCAssignToReg<[R24,R22]>>,
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| /external/autotest/site_utils/autoupdate/ |
| D | release_config.ini | 14 branch_points: R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22,
32 # R22 actual branchpoint is 2723.0.0
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| /external/libgdx/extensions/gdx-bullet/jni/src/bullet/BulletCollision/CollisionDispatch/ |
| D | btBoxBoxDetector.cpp | 271 btScalar A[3],B[3],R11,R12,R13,R21,R22,R23,R31,R32,R33, in dBoxBox2() local
289 R21 = dDOT44(R1+1,R2+0); R22 = dDOT44(R1+1,R2+1); R23 = dDOT44(R1+1,R2+2); in dBoxBox2()
293 Q21 = btFabs(R21); Q22 = btFabs(R22); Q23 = btFabs(R23); in dBoxBox2()
364 TST(pp[2]*R22-pp[1]*R32,(A[1]*Q32+A[2]*Q22+B[0]*Q13+B[2]*Q11),0,-R32,R22,8); in dBoxBox2()
374 TST(pp[1]*R12-pp[0]*R22,(A[0]*Q22+A[1]*Q12+B[0]*Q33+B[2]*Q31),-R22,R12,0,14); in dBoxBox2()
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| /external/autotest/test_suites/ |
| D | control.power_requirements | 17 Ex: x86-mario-release/R22-2494.33.0
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.h | 64 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 }, in getCalleeSavedSpillSlots()
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| D | HexagonRegisterInfo.cpp | 82 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
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| D | HexagonRegisterInfo.td | 108 def D11 : Rd<22, "r23:22", [R22, R23]>, DwarfRegNum<[54]>;
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| D | HexagonFrameLowering.cpp | 659 Hexagon::R21, Hexagon::R20, Hexagon::R23, Hexagon::R22, in insertCFIInstructionsAt()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 213 R21, R22, R23, R24, R25, R26, R27, R28,
222 R21, R22, R23, R24, R25, R26, R27, R28,
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| D | PPCFrameLowering.cpp | 147 {PPC::R22, -40}, in getCalleeSavedSpillSlots()
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| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 169 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
180 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
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| /external/valgrind/VEX/orig_ppc32/ |
| D | return0.orig | 4018 71: GETL R22, t56
4026 77: PUTL t60, R22
4649 6: PUTL t4, R22
6087 0: GETL R22, t0
6330 128: GETL R22, t102
6338 134: PUTL t106, R22
7362 0: GETL R22, t0
7470 8: GETL R22, t6
7521 43: PUTL t32, R22
8667 0: GETL R22, t0
[all …]
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| D | date.orig | 4018 71: GETL R22, t56
4026 77: PUTL t60, R22
4649 6: PUTL t4, R22
6087 0: GETL R22, t0
6330 128: GETL R22, t102
6338 134: PUTL t106, R22
7362 0: GETL R22, t0
7470 8: GETL R22, t6
7521 43: PUTL t32, R22
8667 0: GETL R22, t0
[all …]
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 530 Register = Hexagon::R22; in compoundRegisterMap()
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| D | HexagonMCDuplexInfo.cpp | 676 case Hexagon::R22: in addOps()
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| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 42 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
53 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
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| /external/llvm/lib/Target/Hexagon/Disassembler/ |
| D | HexagonDisassembler.cpp | 497 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24, in DecodeIntRegsRegisterClass()
|