/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 865 SETLE, // 1 X 1 0 1 True if less than or equal enumerator 875 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrInteger.td | 45 defm LE_S : ComparisonInt<SETLE, "le_s">;
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUInstructions.td | 74 case ISD::SETLE: return true;}}}]
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D | R600Instructions.td | 1199 (selectcc (i32 R600_Reg32:$src0), R600_Reg32:$src1, -1, 0, SETLE),
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/external/llvm/lib/CodeGen/ |
D | Analysis.cpp | 190 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN() 204 case ICmpInst::ICMP_SLE: return ISD::SETLE; in getICmpCondCode()
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D | TargetLoweringBase.cpp | 710 CCs[RTLIB::OLE_F32] = ISD::SETLE; in InitCmpLibcallCCs() 711 CCs[RTLIB::OLE_F64] = ISD::SETLE; in InitCmpLibcallCCs() 712 CCs[RTLIB::OLE_F128] = ISD::SETLE; in InitCmpLibcallCCs()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonSelectCCInfo.td | 49 IntRegs:$fval, SETLE)),
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/external/llvm/lib/Target/X86/ |
D | X86InstrCMovSetCC.td | 110 defm SETLE : SETCC<0x9E, "setle", X86_COND_LE>; // signed less than or equal
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D | X86IntrinsicsInfo.h | 1683 X86_INTRINSIC_DATA(sse2_comile_sd, COMI, X86ISD::COMI, ISD::SETLE), 1726 X86_INTRINSIC_DATA(sse2_ucomile_sd, COMI, X86ISD::UCOMI, ISD::SETLE), 1755 X86_INTRINSIC_DATA(sse_comile_ss, COMI, X86ISD::COMI, ISD::SETLE), 1766 X86_INTRINSIC_DATA(sse_ucomile_ss, COMI, X86ISD::UCOMI, ISD::SETLE),
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstructions.td | 96 [{return N->get() == ISD::SETOLE || N->get() == ISD::SETLE;}] 128 def COND_SLE : PatLeaf <(cond), [{return N->get() == ISD::SETLE;}]>;
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D | R600ISelLowering.cpp | 49 setCondCodeAction(ISD::SETLE, MVT::f32, Expand); in R600TargetLowering() 59 setCondCodeAction(ISD::SETLE, MVT::i32, Expand); in R600TargetLowering()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrQPX.td | 1032 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLE), 1079 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLE), 1121 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLE)), 1142 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLE)), 1163 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLE)),
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D | PPCInstrInfo.td | 2880 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETLE)), 3023 defm : ExtSetCCPat<SETLE, 3055 defm : ExtSetCCPat<SETLE, 3098 defm : CRNotPat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETLE)), 3126 defm : CRNotPat<(i1 (setcc i32:$s1, i32:$s2, SETLE)), 3166 defm : CRNotPat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETLE)), 3194 defm : CRNotPat<(i1 (setcc i64:$s1, i64:$s2, SETLE)), 3221 defm : CRNotPat<(i1 (setcc f32:$s1, f32:$s2, SETLE)), 3252 defm : CRNotPat<(i1 (setcc f64:$s1, f64:$s2, SETLE)), 3275 def : Pat <(i1 (selectcc i1:$lhs, i1:$rhs, i1:$tval, i1:$fval, SETLE)), [all …]
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D | PPCISelDAGToDAG.cpp | 2107 case ISD::SETLE: return PPC::PRED_LE; in getPredicateForSetCC() 2137 case ISD::SETLE: Invert = true; return 1; // !Bit #1 = SETULE in getCRIdxForSetCC() 2163 case ISD::SETLE: CC = ISD::SETGE; Swap = true; break; in getVCmpInst() 2209 case ISD::SETGE: CC = ISD::SETLE; Swap = true; break; in getVCmpInst() 2219 case ISD::SETLE: CC = ISD::SETGT; Negate = true; break; in getVCmpInst()
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D | PPCInstrVSX.td | 954 def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETLE)), 975 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLE)), 1074 def : Pat<(f32 (selectcc i1:$lhs, i1:$rhs, f32:$tval, f32:$fval, SETLE)),
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 154 case ISD::SETLE: in softenSetCCOperands() 1471 case ISD::SETLE: in SimplifySetCC() 1646 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { in SimplifySetCC() 1650 ISD::CondCode NewCC = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; in SimplifySetCC() 1667 if ((Cond == ISD::SETLE || Cond == ISD::SETULE) && C1 == MaxVal) in SimplifySetCC() 2073 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> ~Y | X in SimplifySetCC()
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D | SelectionDAGDumper.cpp | 350 case ISD::SETLE: return "setle"; in getOperationName()
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D | LegalizeIntegerTypes.cpp | 978 case ISD::SETLE: in PromoteSetCCOperands() 2746 case ISD::SETLE: in IntegerExpandSetCCOperands() 2781 (CCCode == ISD::SETLE || CCCode == ISD::SETGE || in IntegerExpandSetCCOperands() 2813 case ISD::SETLE: CCCode = ISD::SETGE; FlipOperands = true; break; in IntegerExpandSetCCOperands()
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/external/llvm/lib/Target/BPF/ |
D | BPFISelLowering.cpp | 471 case ISD::SETLE: in NegateCC()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 960 case ISD::SETLE: in isLegalDSPCondCode() 1008 if (CondCode == ISD::SETLT || CondCode == ISD::SETLE) in performVSELECTCombine() 1704 Op->getOperand(2), ISD::SETLE); in lowerINTRINSIC_WO_CHAIN() 1710 lowerMSASplatImm(Op, 2, DAG), ISD::SETLE); in lowerINTRINSIC_WO_CHAIN()
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D | MipsDSPInstrInfo.td | 1391 def : DSPSetCCPat<PseudoCMP_LE_PH, PseudoPICK_PH, v2i16, SETLE>; 1404 def : DSPSelectCCPat<PseudoCMP_LE_PH, PseudoPICK_PH, v2i16, SETLE>;
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D | MipsMSAInstrInfo.td | 199 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 200 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 201 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 202 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 586 def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode; 985 (setcc node:$lhs, node:$rhs, SETLE)>;
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 1064 case ISD::SETLE: in changeIntCCToAArch64CC() 1127 case ISD::SETLE: in changeFPCCToAArch64CC() 1451 CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT; in getAArch64Cmp() 1466 case ISD::SETLE: in getAArch64Cmp() 1472 CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; in getAArch64Cmp() 8980 (Op == ISD::SMIN && CC != ISD::SETLT && CC != ISD::SETLE) || in performAcrossLaneMinMaxReductionCombine() 8987 CC != ISD::SETLE)) in performAcrossLaneMinMaxReductionCombine()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 860 case ISD::SETLE: in EmitCMP()
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