/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 845 SETOGT, // 0 0 1 0 True if ordered and greater than enumerator
|
/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUInstructions.td | 52 case ISD::SETOGT: case ISD::SETUGT:
|
D | AMDILISelLowering.cpp | 133 setOperationAction(ISD::SETOGT, VT, Expand); in InitAMDILLowering()
|
/external/llvm/lib/CodeGen/ |
D | Analysis.cpp | 167 case FCmpInst::FCMP_OGT: return ISD::SETOGT; in getFCmpCondCode() 191 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
|
/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrFloat.td | 59 defm GT : ComparisonFP<SETOGT, "gt ">;
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 331 case ISD::SETOGT: return "setogt"; in getOperationName()
|
D | TargetLowering.cpp | 160 case ISD::SETOGT: in softenSetCCOperands() 1841 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGT); in SimplifySetCC()
|
D | SelectionDAG.cpp | 337 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE in getSetCCAndOperation() 1934 case ISD::SETOGT: in FoldSetCC() 1988 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, dl, VT); in FoldSetCC()
|
D | LegalizeDAG.cpp | 1855 case ISD::SETOGT: in LegalizeSetCCCondCode()
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 2108 case ISD::SETOGT: in getPredicateForSetCC() 2129 case ISD::SETOGT: in getCRIdxForSetCC() 2166 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst() 2175 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst() 2189 case ISD::SETOGT: in getVCmpInst()
|
D | PPCInstrQPX.td | 473 (setcc v4f64:$FRA, v4f64:$FRB, SETOGT))]>; 478 (setcc v4f32:$FRA, v4f32:$FRB, SETOGT))]>;
|
D | PPCInstrInfo.td | 3204 def : Pat<(i1 (setcc f32:$s1, f32:$s2, SETOGT)), 3235 def : Pat<(i1 (setcc f64:$s1, f64:$s2, SETOGT)),
|
/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstructions.td | 81 [{return N->get() == ISD::SETOGT || N->get() == ISD::SETGT;}]
|
D | AMDGPUISelLowering.cpp | 1148 case ISD::SETOGT: { in CombineFMinMaxLegacy() 1932 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT); in LowerFCEIL() 2027 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT); in LowerFRINT()
|
D | SIISelLowering.cpp | 1476 SDValue r2 = DAG.getSetCC(SL, SetCCVT, r1, K0, ISD::SETOGT); in LowerFDIV32()
|
/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 579 def SETOEQ : CondCode; def SETOGT : CondCode; 951 (setcc node:$lhs, node:$rhs, SETOGT)>;
|
/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 192 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand); in MipsSETargetLowering() 197 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand); in MipsSETargetLowering() 324 setCondCodeAction(ISD::SETOGT, Ty, Expand); in addMSAFloatType()
|
D | MipsMSAInstrInfo.td | 163 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 164 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
|
D | MipsISelLowering.cpp | 516 case ISD::SETOGT: return Mips::FCOND_OGT; in condCodeToFCC()
|
/external/llvm/lib/Target/NVPTX/ |
D | NVPTXVector.td | 952 (setcc node:$lhs, node:$rhs, SETOGT)>;
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1870 {ISD::SETOEQ, ISD::SETOGT, ISD::SETOLT, ISD::SETOGE, ISD::SETOLE, in HexagonTargetLowering()
|
/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1408 case ISD::SETOGT: return SPCC::FCC_G; in FPCondCCodeToFCC()
|
/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 1337 case ISD::SETOGT: CondCode = ARMCC::GT; break; in FPCCToARMCC() 3528 else if (CC == ISD::SETUGT || CC == ISD::SETOGT || CC == ISD::SETOLT || in checkVSELConstraints() 4636 case ISD::SETOGT: in LowerVSETCC()
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 1090 case ISD::SETOGT: in changeFPCCToAArch64CC() 8982 (Op == ISD::FMAXNUM && CC != ISD::SETOGT && CC != ISD::SETOGE && in performAcrossLaneMinMaxReductionCombine()
|
/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 2189 case ISD::SETOGT: in getVectorComparison()
|