| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 848 SETOLE, // 0 1 0 1 True if ordered and less than or equal enumerator
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstructions.td | 73 case ISD::SETOLE: case ISD::SETULE:
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| D | AMDILISelLowering.cpp | 134 setOperationAction(ISD::SETOLE, VT, Expand); in InitAMDILLowering()
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| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 170 case FCmpInst::FCMP_OLE: return ISD::SETOLE; in getFCmpCondCode()
190 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 58 defm LE : ComparisonFP<SETOLE, "le ">;
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 334 case ISD::SETOLE: return "setole"; in getOperationName()
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| D | TargetLowering.cpp | 155 case ISD::SETOLE: in softenSetCCOperands()
1831 isCondCodeLegal(ISD::SETOLE, N0.getSimpleValueType())) in SimplifySetCC()
1832 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLE); in SimplifySetCC()
1834 isCondCodeLegal(ISD::SETOLE, N0.getSimpleValueType())) in SimplifySetCC()
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| D | SelectionDAG.cpp | 1937 case ISD::SETOLE: in FoldSetCC()
1992 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || in FoldSetCC()
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| D | LegalizeDAG.cpp | 1858 case ISD::SETOLE: in LegalizeSetCCCondCode()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 96 [{return N->get() == ISD::SETOLE || N->get() == ISD::SETLE;}]
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| D | R600ISelLowering.cpp | 51 setCondCodeAction(ISD::SETOLE, MVT::f32, Expand); in R600TargetLowering()
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| D | AMDGPUISelLowering.cpp | 1120 case ISD::SETOLE: in CombineFMinMaxLegacy()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 580 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
957 (setcc node:$lhs, node:$rhs, SETOLE)>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2096 case ISD::SETOLE: in getPredicateForSetCC()
2143 case ISD::SETOLE: in getCRIdxForSetCC()
2165 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break; in getVCmpInst()
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| D | PPCInstrQPX.td | 995 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETOLE),
1042 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETOLE),
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| D | PPCISelLowering.cpp | 355 setCondCodeAction(ISD::SETOLE, MVT::f32, Expand); in PPCTargetLowering()
356 setCondCodeAction(ISD::SETOLE, MVT::f64, Expand); in PPCTargetLowering()
6064 case ISD::SETOLE: in LowerSELECT_CC()
6104 case ISD::SETOLE: in LowerSELECT_CC()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXVector.td | 958 (setcc node:$lhs, node:$rhs, SETOLE)>;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1341 case ISD::SETOLE: CondCode = ARMCC::LS; break; in FPCCToARMCC()
3523 if (CC == ISD::SETUGE || CC == ISD::SETOGE || CC == ISD::SETOLE || in checkVSELConstraints()
3534 if (CC == ISD::SETOLE || CC == ISD::SETULE || CC == ISD::SETOLT || in checkVSELConstraints()
4638 case ISD::SETOLE: in LowerVSETCC()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsMSAInstrInfo.td | 165 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
166 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
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| D | MipsSEISelLowering.cpp | 1806 Op->getOperand(2), ISD::SETOLE); in lowerINTRINSIC_WO_CHAIN()
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| D | MipsISelLowering.cpp | 518 case ISD::SETOLE: return Mips::FCOND_OLE; in condCodeToFCC()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1870 {ISD::SETOEQ, ISD::SETOGT, ISD::SETOLT, ISD::SETOGE, ISD::SETOLE, in HexagonTargetLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1410 case ISD::SETOLE: return SPCC::FCC_LE; in FPCondCCodeToFCC()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1100 case ISD::SETOLE: in changeFPCCToAArch64CC()
8985 (Op == ISD::FMINNUM && CC != ISD::SETOLT && CC != ISD::SETOLE && in performAcrossLaneMinMaxReductionCombine()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 4098 case ISD::SETOLE: in TranslateX86CC()
4118 case ISD::SETOLE: // flipped in TranslateX86CC()
14224 case ISD::SETOLE: SSECC = 2; break; in translateX86FSETCC()
24001 case ISD::SETOLE: in PerformSELECTCombine()
24089 case ISD::SETOLE: in PerformSELECTCombine()
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