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Searched refs:ScheduleDAGInstrs (Results 1 – 12 of 12) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DScheduleDAGInstrs.h89 class ScheduleDAGInstrs : public ScheduleDAG {
169 explicit ScheduleDAGInstrs(MachineFunction &mf,
173 ~ScheduleDAGInstrs() override {} in ~ScheduleDAGInstrs()
273 inline SUnit *ScheduleDAGInstrs::newSUnit(MachineInstr *MI) { in newSUnit()
285 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { in getSUnit()
DPasses.h28 class ScheduleDAGInstrs; variable
232 virtual ScheduleDAGInstrs *
239 virtual ScheduleDAGInstrs *
DMachineScheduler.h95 class ScheduleDAGInstrs; variable
119 typedef ScheduleDAGInstrs *(*ScheduleDAGCtor)(MachineSchedContext *);
228 class ScheduleDAGMI : public ScheduleDAGInstrs {
259 : ScheduleDAGInstrs(*C->MF, C->MLI, RemoveKillFlags), AA(C->AA), in ScheduleDAGMI()
DScheduleDFS.h25 class ScheduleDAGInstrs; variable
/external/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp52 ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf, in ScheduleDAGInstrs() function in ScheduleDAGInstrs
176 void ScheduleDAGInstrs::startBlock(MachineBasicBlock *bb) { in startBlock()
180 void ScheduleDAGInstrs::finishBlock() { in finishBlock()
189 void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb, in enterRegion()
201 void ScheduleDAGInstrs::exitRegion() { in exitRegion()
213 void ScheduleDAGInstrs::addSchedBarrierDeps() { in addSchedBarrierDeps()
247 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps()
290 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps()
365 LaneBitmask ScheduleDAGInstrs::getLaneMaskForMO(const MachineOperand &MO) const in getLaneMaskForMO()
385 void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) { in addVRegDefDeps()
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DPostRASchedulerList.cpp108 class SchedulePostRATDList : public ScheduleDAGInstrs {
199 : ScheduleDAGInstrs(MF, &MLI), AA(AA), EndIndex(0) { in SchedulePostRATDList()
227 ScheduleDAGInstrs::enterRegion(bb, begin, end, regioninstrs); in enterRegion()
238 ScheduleDAGInstrs::exitRegion(); in exitRegion()
368 ScheduleDAGInstrs::startBlock(BB); in startBlock()
429 ScheduleDAGInstrs::finishBlock(); in finishBlock()
DMachineScheduler.cpp114 void scheduleRegions(ScheduleDAGInstrs &Scheduler, bool FixKillFlags);
129 ScheduleDAGInstrs *createMachineScheduler();
144 ScheduleDAGInstrs *createPostMachineScheduler();
202 static ScheduleDAGInstrs *useDefaultMachineSched(MachineSchedContext *C) { in useDefaultMachineSched()
224 static ScheduleDAGInstrs *createGenericSchedLive(MachineSchedContext *C);
225 static ScheduleDAGInstrs *createGenericSchedPostRA(MachineSchedContext *C);
272 ScheduleDAGInstrs *MachineScheduler::createMachineScheduler() { in createMachineScheduler()
279 ScheduleDAGInstrs *Scheduler = PassConfig->createMachineScheduler(this); in createMachineScheduler()
290 ScheduleDAGInstrs *PostMachineScheduler::createPostMachineScheduler() { in createPostMachineScheduler()
292 ScheduleDAGInstrs *Scheduler = PassConfig->createPostMachineScheduler(this); in createPostMachineScheduler()
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DDFAPacketizer.cpp151 class DefaultVLIWScheduler : public ScheduleDAGInstrs {
165 : ScheduleDAGInstrs(MF, &MLI), AA(AA) { in DefaultVLIWScheduler()
DCMakeLists.txt108 ScheduleDAGInstrs.cpp
DAndroid.mk105 ScheduleDAGInstrs.cpp \
/external/llvm/lib/Target/AMDGPU/
DAMDGPUTargetMachine.cpp64 static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) { in createR600MachineScheduler()
141 ScheduleDAGInstrs *
/external/llvm/lib/Target/Hexagon/
DHexagonTargetMachine.cpp84 static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) { in createVLIWMachineSched()
190 ScheduleDAGInstrs *