Searched refs:Subreg (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| D | Thumb2ITBlockPass.cpp | 78 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true); in TrackDefUses() local
79 Subreg.isValid(); ++Subreg) in TrackDefUses()
80 Uses.insert(*Subreg); in TrackDefUses()
85 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true); in TrackDefUses() local
86 Subreg.isValid(); ++Subreg) in TrackDefUses()
87 Defs.insert(*Subreg); in TrackDefUses()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 2824 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, in Select() local
2829 Subreg, Imm); in Select()
2859 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_8bit_hi, dl, in Select() local
2866 MVT::i32, Subreg, ShiftedImm); in Select()
2884 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_16bit, dl, in Select() local
2889 Subreg, Imm); in Select()
2907 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_32bit, dl, in Select() local
2912 Subreg, Imm); in Select()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2434 unsigned Subreg = (X == 0) ? Hexagon::subreg_loreg : 0; in LowerEXTRACT_VECTOR() local
2437 Subreg = Hexagon::subreg_loreg; in LowerEXTRACT_VECTOR()
2439 Subreg = Hexagon::subreg_hireg; in LowerEXTRACT_VECTOR()
2441 Subreg = Hexagon::subreg_hireg; in LowerEXTRACT_VECTOR()
2443 Subreg = Hexagon::subreg_hireg; in LowerEXTRACT_VECTOR()
2446 N = DAG.getTargetExtractSubreg(Subreg, dl, MVT::i32, Vec); in LowerEXTRACT_VECTOR()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 1007 SDValue Operand, SDValue Subreg);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 6212 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, in getTargetExtractSubreg() local
6214 return SDValue(Subreg, 0); in getTargetExtractSubreg()
6221 SDValue Operand, SDValue Subreg) { in getTargetInsertSubreg() argument
6224 VT, Operand, Subreg, SRIdxVal); in getTargetInsertSubreg()
|