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Searched refs:SwapOps (Results 1 – 2 of 2) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp750 bool SwapOps; in insertSelect() local
753 case PPC::PRED_EQ: SubIdx = PPC::sub_eq; SwapOps = false; break; in insertSelect()
754 case PPC::PRED_NE: SubIdx = PPC::sub_eq; SwapOps = true; break; in insertSelect()
755 case PPC::PRED_LT: SubIdx = PPC::sub_lt; SwapOps = false; break; in insertSelect()
756 case PPC::PRED_GE: SubIdx = PPC::sub_lt; SwapOps = true; break; in insertSelect()
757 case PPC::PRED_GT: SubIdx = PPC::sub_gt; SwapOps = false; break; in insertSelect()
758 case PPC::PRED_LE: SubIdx = PPC::sub_gt; SwapOps = true; break; in insertSelect()
759 case PPC::PRED_UN: SubIdx = PPC::sub_un; SwapOps = false; break; in insertSelect()
760 case PPC::PRED_NU: SubIdx = PPC::sub_un; SwapOps = true; break; in insertSelect()
761 case PPC::PRED_BIT_SET: SubIdx = 0; SwapOps = false; break; in insertSelect()
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/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.td849 bit isSat, bit isRnd, bit isCrnd, bit SwapOps >
864 let Inst{20-16} = !if (SwapOps, Rtt, Rss);
865 let Inst{12-8} = !if (SwapOps, Rss, Rtt);
5350 bit SwapOps, bit isSat = 0, bit isRnd = 0, bit hasShift = 0>
5365 let Inst{20-16} = !if (SwapOps, src2, src1);
5366 let Inst{12-8} = !if (SwapOps, src1, src2);
5371 class T_S3op_64 <string mnemonic, bits<2> MajOp, bits<3> MinOp, bit SwapOps,
5373 : T_S3op_1 <mnemonic, DoubleRegs, MajOp, MinOp, SwapOps,
5389 class T_S3op_2 <string mnemonic, bits<3> MajOp, bit SwapOps>
5403 let Inst{20-16} = !if (SwapOps, Rtt, Rss);
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