Searched refs:TGSI_OPCODE_TXP (Results 1 – 18 of 18) sorted by relevance
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_util.c | 263 case TGSI_OPCODE_TXP: in tgsi_util_get_inst_usage_mask()
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| D | tgsi_info.c | 94 { 1, 2, 1, 0, 0, 0, OTHR, "TXP", TGSI_OPCODE_TXP },
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| D | tgsi_exec.c | 3682 case TGSI_OPCODE_TXP: in exec_instruction()
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 311 #define TGSI_OPCODE_TXP 54 macro
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | radeonsi_shader.c | 602 if (inst->Instruction.Opcode == TGSI_OPCODE_TXP) { in tex_fetch_args()
687 bld_base->op_actions[TGSI_OPCODE_TXP] = tex_action; in si_pipe_shader_create()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_llvm.c | 243 bld_base->op_actions[TGSI_OPCODE_TXP].emit = llvm_emit_tex; in r600_tgsi_llvm()
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| D | r600_shader.c | 3835 } else if (inst->Instruction.Opcode == TGSI_OPCODE_TXP) { in tgsi_tex()
5297 {TGSI_OPCODE_TXP, 0, SQ_TEX_INST_SAMPLE, tgsi_tex},
5471 {TGSI_OPCODE_TXP, 0, SQ_TEX_INST_SAMPLE, tgsi_tex},
5645 {TGSI_OPCODE_TXP, 0, SQ_TEX_INST_SAMPLE, tgsi_tex},
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| /external/mesa3d/src/gallium/drivers/r300/ |
| D | r300_tgsi_to_rc.c | 87 case TGSI_OPCODE_TXP: return RC_OPCODE_TXP; in translate_opcode()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_info.c | 228 case TGSI_OPCODE_TXP: in analyse_instruction()
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| D | lp_bld_tgsi_aos.c | 840 case TGSI_OPCODE_TXP: in lp_emit_instruction_aos()
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| D | lp_bld_tgsi_soa.c | 1390 opcode == TGSI_OPCODE_TXP || in near_end_of_shader()
2127 bld.bld_base.op_actions[TGSI_OPCODE_TXP].emit = txp_emit; in lp_build_tgsi_soa()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_insn.c | 1461 case TGSI_OPCODE_TXP: in emit_tex2()
1666 case TGSI_OPCODE_TXP: in emit_tex()
1695 if (insn->Instruction.Opcode == TGSI_OPCODE_TXP) { in emit_tex()
2537 case TGSI_OPCODE_TXP: in svga_emit_instruction()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_setup_tgsi_llvm.c | 1172 bld_base->op_actions[TGSI_OPCODE_TXP].fetch_args = txp_fetch_args; in radeon_llvm_context_init()
1173 bld_base->op_actions[TGSI_OPCODE_TXP].intr_name = "llvm.AMDGPU.tex"; in radeon_llvm_context_init()
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 244 case TGSI_OPCODE_TXP: in srcMask()
1577 if (tgsi.getOpcode() == TGSI_OPCODE_TXP && !tgt.isCube() && !tgt.isArray()) { in handleTEX()
2030 case TGSI_OPCODE_TXP: in handleInstruction()
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_mesa_to_tgsi.c | 657 return TGSI_OPCODE_TXP; in translate_opcode()
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| D | st_glsl_to_tgsi.cpp | 2645 opcode = TGSI_OPCODE_TXP; in visit()
2692 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) { in visit()
4247 case TGSI_OPCODE_TXP: in compile_tgsi_instruction()
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_fpc_translate.c | 1072 case TGSI_OPCODE_TXP: in i915_translate_instruction()
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| /external/mesa3d/src/gallium/drivers/nv30/ |
| D | nvfx_fragprog.c | 798 case TGSI_OPCODE_TXP: in nvfx_fragprog_parse_instruction()
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