Searched refs:Tmp5 (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | IntrinsicLowering.cpp | 210 Value *Tmp5 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
231 Tmp5 = Builder.CreateAnd(Tmp5, in LowerBSWAP()
248 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); in LowerBSWAP()
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| /external/llvm/lib/Transforms/Utils/ |
| D | IntegerDivision.cpp | 310 Value *Tmp5 = Builder.CreateShl(R_1, One); in generateUnsignedDivisionCode() local
312 Value *Tmp7 = Builder.CreateOr(Tmp5, Tmp6); in generateUnsignedDivisionCode()
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| /external/clang/lib/CodeGen/ |
| D | CGExprComplex.cpp | 784 llvm::Value *Tmp5 = Builder.CreateMul(RHSi, RHSi); // d*d in EmitBinDiv() local
785 llvm::Value *Tmp6 = Builder.CreateAdd(Tmp4, Tmp5); // cc+dd in EmitBinDiv()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2840 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2862 Tmp5 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in ExpandBSWAP()
2871 Tmp5 = DAG.getNode(ISD::AND, dl, VT, Tmp5, in ExpandBSWAP()
2880 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in ExpandBSWAP()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6659 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS() local
6661 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS()
6688 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS() local
6690 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS()
6716 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRA_PARTS() local
6718 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS()
6720 SDValue OutLo = DAG.getSelectCC(dl, Tmp5, DAG.getConstant(0, dl, AmtVT), in LowerSRA_PARTS()
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