| /external/llvm/test/CodeGen/Mips/cconv/ |
| D | arguments-varargs.ll | 46 ; O32-DAG: addiu [[VA:\$[0-9]+]], [[SP]], 12
47 ; O32-DAG: sw [[VA]], 0([[SP]])
49 ; N32-DAG: addiu [[VA:\$[0-9]+]], [[SP]], 8
50 ; N32-DAG: sw [[VA]], 0([[SP]])
52 ; N64-DAG: daddiu [[VA:\$[0-9]+]], [[SP]], 8
53 ; N64-DAG: sd [[VA]], 0([[SP]])
55 ; Store [[VA]]
56 ; O32-DAG: sw [[VA]], 0([[SP]])
60 ; Increment [[VA]]
61 ; O32-DAG: lw [[VA:\$[0-9]+]], 0([[SP]])
[all …]
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 231 CCValAssign &VA = RVLocs[i]; in LowerReturn_32() local
232 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn_32()
236 if (VA.needsCustom()) { in LowerReturn_32()
237 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
248 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Flag); in LowerReturn_32()
250 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
251 VA = RVLocs[++i]; // skip ahead to next loc in LowerReturn_32()
252 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part1, in LowerReturn_32()
255 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Arg, Flag); in LowerReturn_32()
259 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
[all …]
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 208 for (auto &VA : ArgLocs) { in LowerFormalArguments() local
209 if (VA.isRegLoc()) { in LowerFormalArguments()
211 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
220 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerFormalArguments()
226 if (VA.getLocInfo() == CCValAssign::SExt) in LowerFormalArguments()
228 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
229 else if (VA.getLocInfo() == CCValAssign::ZExt) in LowerFormalArguments()
231 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
233 if (VA.getLocInfo() != CCValAssign::Full) in LowerFormalArguments()
234 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
[all …]
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | madak.ll | 10 ; GCN: buffer_load_dword [[VA:v[0-9]+]]
12 ; GCN: v_madak_f32_e32 {{v[0-9]+}}, [[VA]], [[VB]], 0x41200000
33 ; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
37 ; GCN-DAG: v_mad_f32 {{v[0-9]+}}, [[VB]], [[VA]], [[VK]]
38 ; GCN-DAG: v_mac_f32_e32 [[VK]], [[VC]], [[VA]]
65 ; GCN: buffer_load_dword [[VA:v[0-9]+]]
66 ; GCN: v_madak_f32_e32 {{v[0-9]+}}, 4.0, [[VA]], 0x41200000
84 ; GCN: buffer_load_dword [[VA:v[0-9]+]]
86 ; GCN: v_mad_f32 {{v[0-9]+}}, [[VA]], [[VB]], 4.0
106 ; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]]
[all …]
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| D | madmk.ll | 8 ; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
10 ; GCN: v_madmk_f32_e32 {{v[0-9]+}}, [[VA]], [[VB]], 0x41200000
27 ; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
31 ; GCN-DAG: v_mac_f32_e32 [[VB]], [[VK]], [[VA]]
32 ; GCN-DAG: v_mac_f32_e32 [[VC]], [[VK]], [[VA]]
60 ; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
62 ; GCN: v_mac_f32_e32 [[VB]], 4.0, [[VA]]
125 ; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
146 ; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr…
|
| D | llvm.AMDGPU.div_fmas.ll | 19 ; GCN-DAG: v_mov_b32_e32 [[VA:v[0-9]+]], [[SA]]
20 ; GCN: v_div_fmas_f32 [[RESULT:v[0-9]+]], [[VB]], [[VA]], [[VC]]
47 ; SI-DAG: v_mov_b32_e32 [[VA:v[0-9]+]], [[SA]]
48 ; SI: v_div_fmas_f32 [[RESULT:v[0-9]+]], 1.0, [[VA]], [[VC]]
60 ; SI-DAG: v_mov_b32_e32 [[VA:v[0-9]+]], [[SA]]
62 ; SI: v_div_fmas_f32 [[RESULT:v[0-9]+]], [[VA]], [[VB]], 1.0
|
| /external/llvm/test/tools/llvm-pdbdump/ |
| D | load-address.test | 4 ; RUN: %p/Inputs/LoadAddressTest.pdb | FileCheck --check-prefix=VA %s
9 ; VA: ---EXTERNALS---
10 ; VA: [0x40001010] _main
|
| /external/clang/test/Parser/ |
| D | cxx-using-declaration.cpp | 4 int VA; variable
9 using A::VA;
15 VA = 1; in main()
|
| /external/clang/test/CXX/special/class.dtor/ |
| D | p3-0x.cpp | 140 struct VA { struct
142 virtual ~VA() {} in ~VA() argument
145 struct VB : VA
149 struct TVB : VA
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 449 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments() local
450 if (VA.isRegLoc()) { in LowerCCCArguments()
452 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
464 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
470 if (VA.getLocInfo() == CCValAssign::SExt) in LowerCCCArguments()
472 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
473 else if (VA.getLocInfo() == CCValAssign::ZExt) in LowerCCCArguments()
475 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
477 if (VA.getLocInfo() != CCValAssign::Full) in LowerCCCArguments()
478 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
[all …]
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| /external/llvm/tools/llvm-pdbdump/ |
| D | CompilandDumper.cpp | 116 uint64_t VA = Symbol.getVirtualAddress(); in dump() local
119 WithColor(Printer, PDB_ColorItem::Address).get() << format_hex(VA, 10); in dump()
124 << "[" << format_hex(VA, 10) << " - " in dump()
125 << format_hex(VA + Symbol.getLength(), 10) << "]"; in dump()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1090 CCValAssign &VA = ArgLocs[i]; in processCallArgs() local
1091 const Value *ArgVal = CLI.OutVals[VA.getValNo()]; in processCallArgs()
1092 MVT ArgVT = OutVTs[VA.getValNo()]; in processCallArgs()
1097 VA.convertToReg(Mips::F12); in processCallArgs()
1099 VA.convertToReg(Mips::D6); in processCallArgs()
1104 VA.convertToReg(Mips::F14); in processCallArgs()
1106 VA.convertToReg(Mips::D7); in processCallArgs()
1112 VA.isMemLoc()) { in processCallArgs()
1113 switch (VA.getLocMemOffset()) { in processCallArgs()
1115 VA.convertToReg(Mips::A0); in processCallArgs()
[all …]
|
| D | MipsISelLowering.cpp | 2641 CCValAssign &VA = ArgLocs[i]; in LowerCall() local
2642 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
2659 VA); in LowerCall()
2665 switch (VA.getLocInfo()) { in LowerCall()
2669 if (VA.isRegLoc()) { in LowerCall()
2681 unsigned LocRegLo = VA.getLocReg(); in LowerCall()
2714 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCall()
2716 ISD::SHL, DL, VA.getLocVT(), Arg, in LowerCall()
2717 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCall()
2722 if (VA.isRegLoc()) { in LowerCall()
[all …]
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| /external/mksh/src/ |
| D | shf.c | 774 #define VA(type) va_arg(args, type) in shf_vfprintf() macro
823 tmp = VA(int); in shf_vfprintf()
884 lnum = (long)VA(ssize_t); in shf_vfprintf()
886 lnum = VA(long); in shf_vfprintf()
888 lnum = (long)(short)VA(int); in shf_vfprintf()
890 lnum = (long)VA(int); in shf_vfprintf()
897 lnum = VA(size_t); in shf_vfprintf()
899 lnum = VA(unsigned long); in shf_vfprintf()
901 lnum = (unsigned long)(unsigned short)VA(int); in shf_vfprintf()
903 lnum = (unsigned long)VA(unsigned int); in shf_vfprintf()
[all …]
|
| /external/clang/test/Preprocessor/ |
| D | macro_paste_bad.c | 32 #define VA __VA_ ## ARGS__ macro
33 int VA; // expected-warning {{__VA_ARGS__ can only appear in the expansion of a C99 variadic macr… variable
|
| /external/skia/src/sfnt/ |
| D | SkOTTable_OS_2.h | 31 struct VA : SkOTTableOS2_VA { } vA; struct
45 static_assert(sizeof(SkOTTableOS2::Version::VA) == 68, "sizeof_SkOTTableOS2__VA_not_68");
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1082 const CCValAssign &VA = RVLocs[i]; in LowerCallResult() local
1083 if (VA.isRegLoc()) { in LowerCallResult()
1084 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(), in LowerCallResult()
1089 assert(VA.isMemLoc()); in LowerCallResult()
1090 ResultMemLocs.push_back(std::make_pair(VA.getLocMemOffset(), in LowerCallResult()
1161 CCValAssign &VA = ArgLocs[i]; in LowerCCCCallTo() local
1165 switch (VA.getLocInfo()) { in LowerCCCCallTo()
1169 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1172 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1175 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
[all …]
|
| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1049 CCValAssign &VA = ValLocs[0]; in X86SelectRet() local
1052 if (VA.getLocInfo() != CCValAssign::Full) in X86SelectRet()
1055 if (!VA.isRegLoc()) in X86SelectRet()
1060 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) in X86SelectRet()
1063 unsigned SrcReg = Reg + VA.getValNo(); in X86SelectRet()
1065 EVT DstVT = VA.getValVT(); in X86SelectRet()
1089 unsigned DstReg = VA.getLocReg(); in X86SelectRet()
1098 RetRegs.push_back(VA.getLocReg()); in X86SelectRet()
2950 CCValAssign const &VA = ArgLocs[i]; in fastLowerCall() local
2951 const Value *ArgVal = OutVals[VA.getValNo()]; in fastLowerCall()
[all …]
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1284 CCValAssign &VA = ArgLocs[I]; in processCallArgs() local
1285 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1290 !VA.isRegLoc() || VA.needsCustom()) in processCallArgs()
1294 if (VA.getLocInfo() == CCValAssign::BCvt) in processCallArgs()
1322 CCValAssign &VA = ArgLocs[I]; in processCallArgs() local
1323 unsigned Arg = ArgRegs[VA.getValNo()]; in processCallArgs()
1324 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1327 switch (VA.getLocInfo()) { in processCallArgs()
1333 MVT DestVT = VA.getLocVT(); in processCallArgs()
1345 MVT DestVT = VA.getLocVT(); in processCallArgs()
[all …]
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1893 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() local
1894 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs()
1901 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1903 } else if (VA.needsCustom()) { in ProcessCallArgs()
1905 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1907 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
1943 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() local
1944 const Value *ArgVal = Args[VA.getValNo()]; in ProcessCallArgs()
1945 unsigned Arg = ArgRegs[VA.getValNo()]; in ProcessCallArgs()
1946 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs()
[all …]
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| D | ARMISelLowering.cpp | 1440 CCValAssign VA = RVLocs[i]; in LowerCallResult() local
1445 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32 && in LowerCallResult()
1452 if (VA.needsCustom()) { in LowerCallResult()
1454 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
1458 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
1459 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
1467 if (VA.getLocVT() == MVT::v2f64) { in LowerCallResult()
1472 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
1473 Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); in LowerCallResult()
1476 VA = RVLocs[++i]; // skip ahead to next loc in LowerCallResult()
[all …]
|
| /external/llvm/tools/llvm-readobj/ |
| D | ARMWinEHPrinter.cpp | 187 Decoder::getSectionContaining(const COFFObjectFile &COFF, uint64_t VA) { in getSectionContaining() argument
192 if (VA >= Address && (VA - Address) <= Size) in getSectionContaining()
199 uint64_t VA, bool FunctionOnly) { in getSymbol() argument
207 if (*Address == VA) in getSymbol()
511 uint64_t FunctionAddress, uint64_t VA) { in dumpXDataRecord() argument
517 uint64_t Offset = VA - SectionVA; in dumpXDataRecord()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 578 CCValAssign &VA = RVLocs[i]; in LowerReturn() local
580 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); in LowerReturn()
584 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
697 CCValAssign &VA = ArgLocs[i]; in LowerCall() local
698 if (VA.isMemLoc()) { in LowerCall()
720 CCValAssign &VA = ArgLocs[i]; in LowerCall() local
724 bool ArgAlign = IsHvxVectorType(VA.getValVT()); in LowerCall()
728 switch (VA.getLocInfo()) { in LowerCall()
736 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
739 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
[all …]
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 803 CCValAssign &VA, SDValue Chain, in convertLocVTToValVT() argument
807 if (VA.getLocInfo() == CCValAssign::SExt) in convertLocVTToValVT()
808 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
809 DAG.getValueType(VA.getValVT())); in convertLocVTToValVT()
810 else if (VA.getLocInfo() == CCValAssign::ZExt) in convertLocVTToValVT()
811 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
812 DAG.getValueType(VA.getValVT())); in convertLocVTToValVT()
814 if (VA.isExtInLoc()) in convertLocVTToValVT()
815 Value = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Value); in convertLocVTToValVT()
816 else if (VA.getLocInfo() == CCValAssign::Indirect) in convertLocVTToValVT()
[all …]
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| /external/clang/lib/Analysis/ |
| D | LiveVariables.cpp | 292 for (const VariableArrayType* VA = FindVA(VD->getType()); in Visit() local
293 VA != nullptr; VA = FindVA(VA->getElementType())) { in Visit()
294 AddLiveStmt(val.liveStmts, LV.SSetFact, VA->getSizeExpr()); in Visit()
|