/external/llvm/test/CodeGen/SystemZ/ |
D | args-06.ll | 16 %addc = add i8 %addb, %c 17 %addd = add i8 %addc, %d 34 %addc = add i16 %addb, %c 35 %addd = add i16 %addc, %d 52 %addc = add i32 %addb, %c 53 %addd = add i32 %addc, %d 70 %addc = add i64 %addb, %c 71 %addd = add i64 %addc, %d
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/external/antlr/antlr-3.4/runtime/C/src/ |
D | antlr3debughandlers.c | 406 buffer->addc(buffer, character); in serializeText() 439 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeToken() 441 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeToken() 443 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeToken() 445 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeToken() 494 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeNode() 499 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeNode() 509 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeNode() 515 delboy->tokenString->addc(delboy->tokenString, ' '); in serializeNode() 523 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeNode() [all …]
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D | antlr3basetreeadaptor.c | 223 dotSpec->addc(dotSpec, text->charAt(text, j)); in defineDotNodes() 310 dotSpec->addc(dotSpec, text->charAt(text, j)); in defineDotEdges() 339 dotSpec->addc(dotSpec, text->charAt(text, j)); in defineDotEdges() 416 dotSpec->addc(dotSpec, text->charAt(text, j)); in makeDot()
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D | antlr3commontreenodestream.c | 846 text->addc (text, ' '); in toStringWork() 862 buf->addc (buf, ' '); in toStringWork() 876 buf->addc (buf, ' '); in toStringWork()
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D | antlr3commontoken.c | 582 outtext->addc (outtext, ']'); in toString()
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D | antlr3string.c | 277 string->addc = addc8; in stringInit8() 314 string->addc = addcUTF16; in stringInitUTF16()
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/external/llvm/test/CodeGen/PowerPC/ |
D | ppc64-i128-abi.ll | 123 ; Add the lower 64-bits using addc on registers 3 and 5 131 ; Add the lower 64-bits using addc on registers 4 and 6 138 ; CHECK-LE: addc 3, 3, 5 143 ; CHECK-BE: addc 4, 4, 6 148 ; CHECK-LE-NOVSX: addc 3, 3, 5 153 ; CHECK-BE-NOVSX: addc 4, 4, 6
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D | big-endian-actual-args.ll | 2 ; RUN: grep "addc 4, 4, 6"
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D | addc.ll | 9 ; CHECK: addc r4, r6, r4
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 433 "addc.b\t{$src2, $dst}", 438 "addc.w\t{$src2, $dst}", 445 "addc.b\t{$src2, $dst}", 450 "addc.w\t{$src2, $dst}", 456 "addc.b\t{$src2, $dst}", 461 "addc.w\t{$src2, $dst}", 468 "addc.b\t{$src, $dst}", 473 "addc.w\t{$src, $dst}", 479 "addc.b\t{$src, $dst}", 484 "addc.w\t{$src, $dst}", [all …]
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/external/llvm/test/CodeGen/AMDGPU/ |
D | uaddo.ll | 10 ; SI: addc 11 ; SI: addc
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D | add_i64.ll | 76 ; SI-NOT: addc
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D | split-scalar-i64-add.ll | 6 ; SALU, but the upper half does not. The addc expects the carry bit
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/external/llvm/test/CodeGen/ARM/ |
D | 2011-08-29-SchedCycle.ll | 30 ; fix subc / sube (and addc / adde) to use physical register dependency instead.
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/external/antlr/antlr-3.4/runtime/C/include/ |
D | antlr3string.h | 146 pANTLR3_UINT8 (*addc) (struct ANTLR3_STRING_struct * string, ANTLR3_UINT32 c); member
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding.s | 318 # CHECK-BE: addc 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x14] 319 # CHECK-LE: addc 2, 3, 4 # encoding: [0x14,0x20,0x43,0x7c] 320 addc 2, 3, 4 321 # CHECK-BE: addc. 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x15] 322 # CHECK-LE: addc. 2, 3, 4 # encoding: [0x15,0x20,0x43,0x7c] 323 addc. 2, 3, 4
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/external/v8/test/cctest/ |
D | test-disasm-ppc.cc | 100 COMPARE(addc(r9, r7, r9), "7d274814 addc r9, r7, r9"); in TEST()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZInstrInfo.td | 739 defm ALR : BinaryRRAndK<"al", 0x1E, 0xB9FA, addc, GR32, GR32>; 740 defm ALGR : BinaryRREAndK<"alg", 0xB90A, 0xB9EA, addc, GR64, GR64>; 745 def ALHSIK : BinaryRIE<"alhsik", 0xECDA, addc, GR32, imm32sx16>, 747 def ALGHSIK : BinaryRIE<"alghsik", 0xECDB, addc, GR64, imm64sx16>, 751 def ALFI : BinaryRIL<"alfi", 0xC2B, addc, GR32, uimm32>; 752 def ALGFI : BinaryRIL<"algfi", 0xC2A, addc, GR64, imm64zx32>; 755 defm AL : BinaryRXPair<"al", 0x5E, 0xE35E, addc, GR32, load, 4>; 756 def ALGF : BinaryRXY<"algf", 0xE31A, addc, GR64, azextloadi32, 4>; 757 def ALG : BinaryRXY<"alg", 0xE30A, addc, GR64, load, 8>; 759 defm : ZXB<addc, GR64, ALGFR>; [all …]
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/external/valgrind/none/tests/ppc64/ |
D | jm-int.stdout.exp-LE | 22 addc 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000) 23 addc 0000000000000000, 0000001cbe991def => 0000001cbe991def (00000000 00000000) 24 addc 0000000000000000, ffffffffffffffff => ffffffffffffffff (00000000 00000000) 25 addc 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000 00000000) 26 addc 0000001cbe991def, 0000001cbe991def => 000000397d323bde (00000000 00000000) 27 addc 0000001cbe991def, ffffffffffffffff => 0000001cbe991dee (00000000 20000000) 28 addc ffffffffffffffff, 0000000000000000 => ffffffffffffffff (00000000 00000000) 29 addc ffffffffffffffff, 0000001cbe991def => 0000001cbe991dee (00000000 20000000) 30 addc ffffffffffffffff, ffffffffffffffff => fffffffffffffffe (00000000 20000000) 251 addc. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000) [all …]
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/external/valgrind/none/tests/ppc32/ |
D | jm-int.stdout.exp | 22 addc 00000000, 00000000 => 00000000 (00000000 00000000) 23 addc 00000000, 000f423f => 000f423f (00000000 00000000) 24 addc 00000000, ffffffff => ffffffff (00000000 00000000) 25 addc 000f423f, 00000000 => 000f423f (00000000 00000000) 26 addc 000f423f, 000f423f => 001e847e (00000000 00000000) 27 addc 000f423f, ffffffff => 000f423e (00000000 20000000) 28 addc ffffffff, 00000000 => ffffffff (00000000 00000000) 29 addc ffffffff, 000f423f => 000f423e (00000000 20000000) 30 addc ffffffff, ffffffff => fffffffe (00000000 20000000)
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64le-encoding.txt | 253 # CHECK: addc 2, 3, 4 256 # CHECK: addc. 2, 3, 4
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D | ppc64-encoding.txt | 253 # CHECK: addc 2, 3, 4 256 # CHECK: addc. 2, 3, 4
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/external/llvm/test/MC/Sparc/ |
D | sparcv9-instructions.s | 5 ! V8-NEXT: addc %g2, %g1, %g3 7 addc %g2, %g1, %g3
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb.td | 1326 def : T1Pat<(addc tGPR:$lhs, imm0_7:$rhs), 1328 def : T1Pat<(addc tGPR:$lhs, imm8_255:$rhs), 1330 def : T1Pat<(addc tGPR:$lhs, tGPR:$rhs), 1334 def : T1Pat<(addc tGPR:$lhs, imm0_7_neg:$rhs), 1336 def : T1Pat<(addc tGPR:$lhs, imm8_255_neg:$rhs),
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXVector.td | 318 def AddCCV4I32 : VecBinaryOp<V4AsmStr<"add.cc.s32">, addc, V4I32Regs, 320 def AddCCV2I32 : VecBinaryOp<V2AsmStr<"add.cc.s32">, addc, V2I32Regs, 326 def AddCCCV4I32 : VecBinaryOp<V4AsmStr<"addc.cc.s32">, adde, V4I32Regs, 328 def AddCCCV2I32 : VecBinaryOp<V2AsmStr<"addc.cc.s32">, adde, V2I32Regs,
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