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Searched refs:dw5 (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dgen6_wm_state.c99 uint32_t dw2, dw4, dw5, dw6; in upload_wm_state() local
131 dw2 = dw4 = dw5 = dw6 = 0; in upload_wm_state()
133 dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0; in upload_wm_state()
134 dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5; in upload_wm_state()
151 dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT; in upload_wm_state()
155 dw5 |= GEN6_WM_8_DISPATCH_ENABLE; in upload_wm_state()
157 dw5 |= GEN6_WM_16_DISPATCH_ENABLE; in upload_wm_state()
159 dw5 |= GEN6_WM_16_DISPATCH_ENABLE; in upload_wm_state()
166 dw5 |= GEN6_WM_DUAL_SOURCE_BLEND_ENABLE; in upload_wm_state()
171 dw5 |= GEN6_WM_LINE_STIPPLE_ENABLE; in upload_wm_state()
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Dgen7_wm_state.c117 uint32_t dw2, dw4, dw5; in upload_ps_state() local
162 dw2 = dw4 = dw5 = 0; in upload_ps_state()
207 dw5 |= (brw->wm.prog_data->first_curbe_grf << in upload_ps_state()
209 dw5 |= (brw->wm.prog_data->first_curbe_grf_16 << in upload_ps_state()
224 OUT_BATCH(dw5); in upload_ps_state()
Dgen6_blorp.cpp712 uint32_t dw2, dw4, dw5, dw6; in gen6_blorp_emit_wm_config() local
723 dw2 = dw4 = dw5 = dw6 = 0; in gen6_blorp_emit_wm_config()
741 dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0; in gen6_blorp_emit_wm_config()
742 dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5; in gen6_blorp_emit_wm_config()
743 dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT; in gen6_blorp_emit_wm_config()
749 dw5 |= GEN6_WM_16_DISPATCH_ENABLE; in gen6_blorp_emit_wm_config()
750 dw5 |= GEN6_WM_KILL_ENABLE; /* TODO: temporarily smash on */ in gen6_blorp_emit_wm_config()
751 dw5 |= GEN6_WM_DISPATCH_ENABLE; /* We are rendering */ in gen6_blorp_emit_wm_config()
771 OUT_BATCH(dw5); in gen6_blorp_emit_wm_config()
Dgen7_blorp.cpp483 uint32_t dw2, dw4, dw5; in gen7_blorp_emit_ps_config() local
487 dw2 = dw4 = dw5 = 0; in gen7_blorp_emit_ps_config()
503 dw5 |= prog_data->first_curbe_grf << GEN7_PS_DISPATCH_START_GRF_SHIFT_0; in gen7_blorp_emit_ps_config()
512 OUT_BATCH(dw5); in gen7_blorp_emit_ps_config()