| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | R600InstrInfo.h | 106 int getInstrLatency(const InstrItineraryData *ItinData,
110 virtual int getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function
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| D | R600InstrInfo.cpp | 470 int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in R600InstrInfo
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.h | 204 unsigned int getInstrLatency(const InstrItineraryData *ItinData,
208 int getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function
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| D | R600InstrInfo.cpp | 1042 unsigned int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in R600InstrInfo
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| /external/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 175 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, DefMI); in computeOperandLatency()
257 return TII->getInstrLatency(&InstrItins, MI); in computeInstrLatency()
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| D | TargetInstrInfo.cpp | 998 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in TargetInstrInfo
1046 getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in TargetInstrInfo
1088 return getInstrLatency(ItinData, DefMI); in computeDefOperandLatency()
1130 unsigned InstrLatency = getInstrLatency(ItinData, DefMI); in computeOperandLatency()
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| D | TwoAddressInstructionPass.cpp | 865 if (TII->getInstrLatency(InstrItins, MI) > 1) in rescheduleMIBelowKill()
997 if (TII->getInstrLatency(InstrItins, &DefMI) > (Dist - DefDist)) in isDefTooClose()
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| /external/llvm/lib/Target/X86/ |
| D | X86PadShortFunction.cpp | 194 CyclesToEnd += TII->getInstrLatency(STI->getInstrItineraryData(), MI); in cyclesUntilReturn()
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| D | X86FixupLEAs.cpp | 229 InstrDistance += TII->getInstrLatency( in searchBackwards()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 332 unsigned getInstrLatency(const InstrItineraryData *ItinData,
336 int getInstrLatency(const InstrItineraryData *ItinData,
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| D | ARMBaseInstrInfo.cpp | 3690 unsigned Latency = getInstrLatency(ItinData, DefMI); in getOperandLatency()
3967 unsigned ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in ARMBaseInstrInfo
3982 Latency += getInstrLatency(ItinData, &*I, PredCost); in getInstrLatency()
4017 int ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in ARMBaseInstrInfo
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 115 unsigned getInstrLatency(const InstrItineraryData *ItinData,
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| D | PPCInstrInfo.cpp | 110 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in PPCInstrInfo
114 return PPCGenInstrInfo::getInstrLatency(ItinData, MI, PredCost); in getInstrLatency()
166 Latency = getInstrLatency(ItinData, DefMI); in getOperandLatency()
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 1179 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData,
1185 virtual int getInstrLatency(const InstrItineraryData *ItinData,
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.h | 237 unsigned getInstrLatency(const InstrItineraryData *ItinData,
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| D | HexagonInstrInfo.cpp | 1374 unsigned HexagonInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() function in HexagonInstrInfo
3535 return getInstrLatency(ItinData, MI); in getInstrTimingClassLatency()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGSDNodes.cpp | 622 SU->Latency += TII->getInstrLatency(InstrItins, N); in computeLatency()
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