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Searched refs:getLocVT (Results 1 – 20 of 20) sorted by relevance

/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp237 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
250 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
259 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
322 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
325 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
328 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
354 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_64()
424 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerFormalArguments_32()
452 WholeValue = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), WholeValue); in LowerFormalArguments_32()
459 if (VA.getLocVT() == MVT::f32) in LowerFormalArguments_32()
[all …]
/external/llvm/lib/Target/BPF/
DBPFISelLowering.cpp211 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
321 Arg = DAG.getNode(ISD::SIGN_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
324 Arg = DAG.getNode(ISD::ZERO_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
327 Arg = DAG.getNode(ISD::ANY_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
422 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp452 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
495 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
498 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
508 VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
555 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
611 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
614 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
617 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2642 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
2714 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCall()
2716 ISD::SHL, DL, VA.getLocVT(), Arg, in LowerCall()
2717 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCall()
2835 RVLocs[i].getLocVT(), InFlag); in LowerCallResult()
2841 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCallResult()
2845 Shift, DL, VA.getLocVT(), Val, in LowerCallResult()
2846 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCallResult()
2863 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
2869 Val = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Val, in LowerCallResult()
[all …]
DMipsFastISel.cpp1140 MVT DestVT = VA.getLocVT(); in processCallArgs()
1148 MVT DestVT = VA.getLocVT(); in processCallArgs()
/external/llvm/lib/Target/X86/
DX86FastISel.cpp2963 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
2965 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
2968 ArgVT = VA.getLocVT(); in fastLowerCall()
2972 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
2974 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
2977 ArgVT = VA.getLocVT(); in fastLowerCall()
2981 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
2983 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
2986 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
2989 Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
[all …]
DX86ISelLowering.cpp2221 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
2223 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
2226 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
2228 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
2231 ValToCopy = DAG.getBitcast(VA.getLocVT(), ValToCopy); in LowerReturn()
2281 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
2393 EVT CopyVT = VA.getLocVT(); in LowerCallResult()
2407 RoundAfterCopy = (CopyVT != VA.getLocVT()); in LowerCallResult()
2553 ValVT = VA.getLocVT(); in LowerMemArgument()
2700 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
[all …]
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp1169 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1172 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1175 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1330 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
1350 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
1353 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
1364 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
1508 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerReturn()
1537 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/external/llvm/lib/Target/ARM/
DARMCallingConv.h188 assert(PendingMembers[0].getLocVT() == LocVT); in CC_ARM_AAPCS_Custom_Aggregate()
DARMFastISel.cpp1905 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1955 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1964 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1971 unsigned BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg, in ProcessCallArgs()
1975 ArgVT = VA.getLocVT(); in ProcessCallArgs()
1988 assert(VA.getLocVT() == MVT::f64 && in ProcessCallArgs()
DARMISelLowering.cpp1445 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32 && in LowerCallResult()
1467 if (VA.getLocVT() == MVT::v2f64) { in LowerCallResult()
1487 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), in LowerCallResult()
1637 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1640 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1643 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1646 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
1652 if (VA.getLocVT() == MVT::v2f64) { in LowerCall()
1677 assert(VA.getLocVT() == MVT::i32 && in LowerCall()
2184 EVT RegVT = VA.getLocVT(); in IsEligibleForTailCallOptimization()
[all …]
/external/llvm/include/llvm/CodeGen/
DCallingConvLower.h151 MVT getLocVT() const { return LocVT; } in getLocVT() function
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp808 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
811 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
822 assert(VA.getLocVT() == MVT::i64); in convertLocVTToValVT()
839 return DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
841 return DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
843 return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
847 assert(VA.getLocVT() == MVT::i64); in convertValVTToLocVT()
850 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VA.getLocVT(), Value, in convertValVTToLocVT()
886 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
935 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerFormalArguments()
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp584 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
736 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
739 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
742 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
753 VA.getLocVT().getStoreSizeInBits() >> 3); in LowerCall()
1068 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1130 ObjSize = VA.getLocVT().getStoreSizeInBits() >> 3; in LowerFormalArguments()
1147 InVals.push_back(DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerFormalArguments()
/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp1333 MVT DestVT = VA.getLocVT(); in processCallArgs()
1345 MVT DestVT = VA.getLocVT(); in processCallArgs()
1646 MVT DestVT = VA.getLocVT(); in SelectRet()
DPPCISelLowering.cpp2905 unsigned ArgSize = VA.getLocVT().getStoreSize(); in LowerFormalArguments_32SVR4()
4329 VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
4340 Val = DAG.getNode(ISD::AssertZext, dl, VA.getLocVT(), Val, in LowerCallResult()
4345 Val = DAG.getNode(ISD::AssertSext, dl, VA.getLocVT(), Val, in LowerCallResult()
4666 seenFloatArg |= VA.getLocVT().isFloatingPoint(); in LowerCall_32SVR4()
5802 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerReturn()
5805 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerReturn()
5808 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerReturn()
5814 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp2432 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
2502 MemVT = VA.getLocVT(); in LowerFormalArguments()
2516 ExtType, DL, VA.getLocVT(), Chain, FIN, in LowerFormalArguments()
2662 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i64 && in LowerCallResult()
2669 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
3005 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
3008 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
3016 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
3019 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall()
3022 Arg = DAG.getNode(ISD::FP_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
[all …]
DAArch64FastISel.cpp2933 MVT DestVT = VA.getLocVT(); in processCallArgs()
2943 MVT DestVT = VA.getLocVT(); in processCallArgs()
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1661 EVT MemVT = VA.getLocVT(); in LowerFormalArguments()
DSIISelLowering.cpp686 MVT VT = VA.getLocVT(); in LowerFormalArguments()