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Searched refs:getVT (Results 1 – 25 of 30) sorted by relevance

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/external/apache-commons-math/src/main/java/org/apache/commons/math/linear/
DEigenDecomposition.java77 RealMatrix getVT(); in getVT() method
DSingularValueDecomposition.java101 RealMatrix getVT(); in getVT() method
DSingularValueDecompositionImpl.java200 public RealMatrix getVT() throws InvalidMatrixException { in getVT() method in SingularValueDecompositionImpl
228 getVT().walkInOptimizedOrder(new DefaultRealMatrixPreservingVisitor() { in getCovariance()
DEigenDecompositionImpl.java183 public RealMatrix getVT() throws InvalidMatrixException { in getVT() method in EigenDecompositionImpl
/external/llvm/utils/TableGen/
DDAGISelMatcherEmitter.cpp457 << getEnumName(cast<EmitIntegerMatcher>(N)->getVT()) << ", "; in EmitMatcher()
466 << getEnumName(cast<EmitStringIntegerMatcher>(N)->getVT()) << ", " in EmitMatcher()
477 OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher()
481 OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher()
550 OS << getEnumName(EN->getVT(i)) << ", "; in EmitMatcher()
DDAGISelMatcher.h837 MVT::SimpleValueType getVT() const { return VT; } in getVT() function
862 MVT::SimpleValueType getVT() const { return VT; } in getVT() function
888 MVT::SimpleValueType getVT() const { return VT; } in getVT() function
1041 MVT::SimpleValueType getVT(unsigned i) const { in getVT() function
/external/llvm/lib/IR/
DValueTypes.cpp276 MVT MVT::getVT(Type *Ty, bool HandleUnknown){ in getVT() function in MVT
296 getVT(VTy->getElementType(), false), VTy->getNumElements()); in getVT()
307 return MVT::getVT(Ty, HandleUnknown); in getEVT()
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h661 static MVT getVT(Type *Ty, bool HandleUnknown = false);
DSelectionDAGNodes.h1905 EVT getVT() const { return ValueType; }
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp823 EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits()
1054 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits()
1506 EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT(); in SimplifySetCC()
1613 cast<VTSDNode>(Op0.getOperand(1))->getVT() == MVT::i1) in SimplifySetCC()
2399 MVT::getVT(IntegerType::get(OpTy->getContext(), BitSize), true); in ParseConstraints()
2406 OpInfo.ConstraintVT = MVT::getVT(OpTy, true); in ParseConstraints()
DLegalizeVectorOps.cpp337 QueryType = cast<VTSDNode>(Node->getOperand(1))->getVT(); in LegalizeOp()
794 EVT OrigTy = cast<VTSDNode>(Op->getOperand(1))->getVT(); in ExpandSEXTINREG()
DSelectionDAG.cpp780 EVT VT = cast<VTSDNode>(N)->getVT(); in RemoveNodeFromCSEMaps()
2235 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in computeKnownBits()
2348 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in computeKnownBits()
2536 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits()
2539 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits()
2555 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); in ComputeNumSignBits()
3556 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode()
3568 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. in getNode()
3580 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode()
3592 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode()
[all …]
DSelectionDAGDumper.cpp493 OS << ":" << N->getVT().getEVTString(); in print_details()
DLegalizeIntegerTypes.cpp954 cast<VTSDNode>(OpL->getOperand(1))->getVT() == NewLHS.getValueType() && in PromoteSetCCOperands()
956 cast<VTSDNode>(OpR->getOperand(1))->getVT() == NewRHS.getValueType()) { in PromoteSetCCOperands()
1843 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_AssertSext()
1865 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_AssertZext()
2367 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_SIGN_EXTEND_INREG()
DSelectionDAGISel.cpp2404 if (cast<VTSDNode>(N)->getVT() == VT) in CheckValueType()
2408 return VT == MVT::iPTR && cast<VTSDNode>(N)->getVT() == TLI->getPointerTy(DL); in CheckValueType()
DLegalizeVectorTypes.cpp270 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp()
912 DAG.GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT()); in SplitVecRes_InregOp()
2405 cast<VTSDNode>(N->getOperand(1))->getVT() in WidenVecRes_InregOp()
DLegalizeDAG.cpp1252 EVT InnerType = cast<VTSDNode>(Node->getOperand(1))->getVT(); in LegalizeOp()
3118 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode()
3139 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode()
DDAGCombiner.cpp1780 if (TN->getVT() == MVT::i1) { in visitADD()
1959 if (TN->getVT() == MVT::i1) { in visitSUB()
6738 ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ReduceLoadWidth()
6894 EVT EVT = cast<VTSDNode>(N1)->getVT(); in visitSIGN_EXTEND_INREG()
6911 EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT())) in visitSIGN_EXTEND_INREG()
9076 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in visitFP_ROUND_INREG()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp426 EVT BVT = BaseType->getVT(); in LowerSIGN_EXTEND_INREG()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td671 def vtInt : PatLeaf<(vt), [{ return N->getVT().isInteger(); }]>;
672 def vtFP : PatLeaf<(vt), [{ return N->getVT().isFloatingPoint(); }]>;
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp6790 Info.memVT = MVT::getVT(PtrTy->getElementType()); in getTgtMemIntrinsic()
6803 Info.memVT = MVT::getVT(PtrTy->getElementType()); in getTgtMemIntrinsic()
9200 if ((TypeNode->getVT() == MVT::i8 && width == 8) in checkValueWidth()
9201 || (TypeNode->getVT() == MVT::i16 && width == 16)) { in checkValueWidth()
9209 if ((TypeNode->getVT() == MVT::i8 && width == 8) in checkValueWidth()
9210 || (TypeNode->getVT() == MVT::i16 && width == 16)) { in checkValueWidth()
DAArch64ISelDAGToDAG.cpp370 SrcVT = cast<VTSDNode>(N.getOperand(1))->getVT(); in getExtendTypeForNode()
/external/llvm/lib/Target/Hexagon/
DHexagonISelDAGToDAG.cpp1519 if (T->getVT().getSizeInBits() == FromBits) { in isValueExtension()
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp575 EVT ExtendTy = cast<VTSDNode>(Op0Op2)->getVT(); in performANDCombine()
920 EVT ExtendTy = cast<VTSDNode>(Op0Op0->getOperand(2))->getVT(); in performSRACombine()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp2272 EVT ExtraVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerSIGN_EXTEND_INREG()

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