| /external/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 240 bool isFI() const { return OpKind == MO_FrameIndex; } in isFI() function
431 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) && in getIndex()
527 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) && in setIndex()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFRegisterInfo.cpp | 54 while (!MI.getOperand(i).isFI()) { in eliminateFrameIndex()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64DeadRegisterDefinitionsPass.cpp | 75 if (Op.isFI()) in usesFrameIndex()
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| D | AArch64RegisterInfo.cpp | 247 for (unsigned i = 0; !MI->getOperand(i).isFI(); ++i) in needsFrameBaseReg()
343 while (!MI.getOperand(i).isFI()) { in resolveFrameIndex()
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| /external/llvm/lib/CodeGen/ |
| D | ShrinkWrap.cpp | 247 if (UseOrDefCSR || MO.isFI()) { in INITIALIZE_PASS_DEPENDENCY()
249 << MO.isFI() << "): " << MI << '\n'); in INITIALIZE_PASS_DEPENDENCY()
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| D | LocalStackSlotAllocation.cpp | 309 if (MI->getOperand(i).isFI()) { in insertFrameReferenceRegisters()
347 if (!MI->getOperand(idx).isFI()) in insertFrameReferenceRegisters()
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| D | StackSlotColoring.cpp | 151 if (!MO.isFI()) in ScanForSpillSlotRefs()
355 if (!MO.isFI()) in RewriteInstruction()
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| D | StackColoring.cpp | 535 if (!MO.isFI()) in remapInstructions()
596 if (!MO.isFI()) in removeInvalidSlotRanges()
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| D | RegisterScavenging.cpp | 358 while (!MI->getOperand(i).isFI()) { in getFrameIndexOperandNum()
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| D | PrologEpilogInserter.cpp | 880 if (!MI->getOperand(i).isFI()) in replaceFrameIndices()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 68 if ((MI->getOperand(1).isFI()) && // is a stack slot in isLoadFromStackSlot()
90 if ((MI->getOperand(1).isFI()) && // is a stack slot in isStoreToStackSlot()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 124 if (MI->getOperand(Op).isFI()) return true; in isLeaMem()
136 if (MI->getOperand(Op).isFI()) return true; in isMem()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 477 for (unsigned i = 0; !MI->getOperand(i).isFI(); ++i) { in needsFrameBaseReg()
595 while (!MI.getOperand(i).isFI()) { in resolveFrameIndex()
616 while (!MI->getOperand(i).isFI()) { in isFrameOffsetLegal()
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| D | ARMBaseInstrInfo.cpp | 986 if (MI->getOperand(1).isFI() && in isStoreToStackSlot()
1000 if (MI->getOperand(1).isFI() && in isStoreToStackSlot()
1010 if (MI->getOperand(0).isFI() && in isStoreToStackSlot()
1017 if (MI->getOperand(1).isFI() && in isStoreToStackSlot()
1174 if (MI->getOperand(1).isFI() && in isLoadFromStackSlot()
1188 if (MI->getOperand(1).isFI() && in isLoadFromStackSlot()
1198 if (MI->getOperand(1).isFI() && in isLoadFromStackSlot()
1205 if (MI->getOperand(1).isFI() && in isLoadFromStackSlot()
1845 if (MO.isFI() || MO.isCPI() || MO.isJTI()) in canFoldIntoMOVCC()
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| D | ThumbRegisterInfo.cpp | 434 while (!MI.getOperand(i).isFI()) { in resolveFrameIndex()
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| D | Thumb1FrameLowering.cpp | 309 MI->getOperand(1).isFI() && in isCSRestore()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXPrologEpilogPass.cpp | 62 if (!MI->getOperand(i).isFI()) in runOnMachineFunction()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEFrameLowering.cpp | 154 assert(I->getOperand(0).isReg() && I->getOperand(1).isFI()); in expandLoadCCond()
169 assert(I->getOperand(0).isReg() && I->getOperand(1).isFI()); in expandStoreCCond()
187 assert(I->getOperand(0).isReg() && I->getOperand(1).isFI()); in expandLoadACC()
212 assert(I->getOperand(0).isReg() && I->getOperand(1).isFI()); in expandStoreACC()
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| D | MipsSEInstrInfo.cpp | 47 if ((MI->getOperand(1).isFI()) && // is a stack slot in isLoadFromStackSlot()
69 if ((MI->getOperand(1).isFI()) && // is a stack slot in isStoreToStackSlot()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 51 if (MI->getOperand(1).isFI() && MI->getOperand(2).isImm() && in isLoadFromStackSlot()
72 if (MI->getOperand(0).isFI() && MI->getOperand(1).isImm() && in isStoreToStackSlot()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 252 if (MO.isFI()) in needsStackFrame()
1101 assert(MI->getOperand(0).isFI() && "Expect a frame index"); in replacePredRegPseudoSpillCode()
1127 assert(MI->getOperand(1).isFI() && "Expect a frame index"); in replacePredRegPseudoSpillCode()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 203 MI->getOperand(1).isFI() && in isSimpleMove()
228 !MI->getOperand(0).isFI() || in isStackSlotCopy()
230 !MI->getOperand(3).isFI() || in isStackSlotCopy()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 1003 while (!MI.getOperand(FIOperandNum).isFI()) { in resolveFrameIndex()
1028 while (!MI->getOperand(FIOperandNum).isFI()) { in isFrameOffsetLegal()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 1362 assert(MO.isImm() || MO.isTargetIndex() || MO.isFI()); in isImmOperandLegal()
1497 if (!MI->getOperand(i).isImm() && !MI->getOperand(i).isFI()) { in verifyInstruction()
1799 assert(MO.isImm() || MO.isTargetIndex() || MO.isFI()); in isLegalVSrcOperand()
1835 assert(MO->isImm() || MO->isTargetIndex() || MO->isFI()); in isOperandLegal()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyPEI.cpp | 896 if (!MI->getOperand(i).isFI()) in replaceFrameIndices()
|